Ethernet on Coldire v2 chipset

[Varindra]

Hi,
          We are going to make Coldfire v2 chipset based design, that will include 10/100Mbps ethernet. I think it can be interfaced through memory address/data lines, but for control signals I am not seeing all the ISA lines. Does anyone has knowledge of interfacing the ethernet to Coldfire v2 chipset.  Any input will be highly appreciated.

Thanks & Regards,
Varindra

[RickN]

Schematics are attached

   Thanks,

    Rick

[RickN]

Hi Varindra,

    Can you tell me what is on each of your chip selects please?  I'm guessing CS2 is used for the IDE, and CS0 is for the boot rom, so CS1 is all that is available for your LCD?  Any chance you can try using CS0/CS4 on your design?

    Trying to get the big picture here.

    Thanks,

      Rick

PS:  Are you using Rev. 1 of the 5251 RM, dated 1/2008? 

[Varindra]

Hi Rick,
                    Continuing my previous mail, I have some more details. We are thinking to use DM9000AEP chipset (48 pin) & we are thinking to have the following solution.

We want to
connect the IDE_DIOR# directly to IOR# (of DM9000AEP).
connect the IDE_DIOW# directly to IOW# (of DM9000AEP).
connect the SD[15:0] directly to D[15:0] (of DM9000AEP).
one of the Interupt GPIO to INT (of DM9000AEP).
SA[2] to CMD line (of DM9000AEP).

The above connection is common to all the solution 1, 2 & 3.

Solution 1 : Can we generate CS# (for DM9000AEP) through address decoder SA[15:3, 1:0] of the address lines (at MCF5251).

Solution 2 : Can we generate CS# (for DM9000AEP) through some logic of IOR# & IOW# combination (at MCF5251).

Solution 3 : Can we permanently enable the CS# through GPIO (just after reset) & with the above connection we can get the ethernet controller working.

Out of these three solution, if any solution is going to work (in terms of CS# at the DM9000A).

Thanks & Regards,
Varindra

[Varindra]

Hi Rick,
                    Thank you for the mail & reply. I am having CS# connection as follows :

CS0#/CS4# - Flash
CS1/QSPICS3/GP28 - LCD Display

CS2#/IDEDIOR# are muxed with these ISA lines, hence we can not use CS2# (because of using ISA lines to connect to ethernet).
We have connected IDE on ATA bus, hence CS# for IDE is seperate. I am using Rev. 1 of the 5251 RM, dated 1/2008.

The Chip select CS0# is multiplexed with CS4#. Hence I think we can use either of these.
Presently we are trying to boot from external Flash (since our code size is a little bigger), hence this CS# has beeen used.


Thanks & Regards,
Varindra

[Varindra]

Hi Rick,
                   Thank you for posting the schematics. However, the schematics did not remove our confusion, as I am seeing the CS1/QSPICS3/GPIO28 (this signal we have used for the LCD Display) signal being connected to ethernet controller. I think that  had missed this point in earlier mail - CS1/QSPICS3/GPIO28 has been connected to LCD Display in our schematics.

One solution we are thinking that CS# for the ethernet controller we can generate through address decoding on A[15:2] and A2 driving the CMD line of the davicom chips.
Is it correct to implement this solution or there is some flaw over here.

Thanks & Regards,
Varindra

[RickN]

Hi,

   You might want to consider one of the many V2 core ColdFire embedded processors with built in 10/100 Ethernet.  The peripheral is called the Fast Ethernet Controller (FEC), and is available in many of the V2, V3 and V4 ColdFire processors.   A TCP/IP Stack is provided in source for most of these processors, and is called the ColdFire TCPIP Lite stack written by InterNiche.   Check out www.freescale.com/coldfire.    We offer a ColdFire microcontroller, the MCF52235, that has the 10/100 FEC and a built in MAC and Phy, which can be very useful for embedded systems connectivity.

   Thanks,

       Rick

[Varindra]

Hi Rick,
                  Thank you for the reply, however we are going ahead with a MPU, MCF5251 which supports OTG USB controller. I think there are some ISA control lines in case of MCF5251, which can be used to connect to the external ISA based MAC+PHY. In the datasheet, I am seeing IDE_DIOR#, IDE_DIOW#, IDE_IORDY# which can be used to connect IOR#, IOW#, Wait# signals of the ISA based controller. However, I am still left with INT# & AEN# pin in  the  ISA  based controller.  And  further I require  a  CS#  for the controller. The CS# (other available CS# has been used to connect to other devices, e.g., SDRAM & Flash) is muxed with IDE_DIOR#, IDE_DIOW# signals. Hence I am left with no CS#. In this circumstances, my question is - how to take CS# & how to provide INT# & AEN# signal connection.

Thanks & Regards,
Varindra  

[JWW]

Varindra,

We have two chips in this family.  The MCF5251 which comes with license access to a variety of MP3 encode and decoders and the MCF5253 which is a cheaper version that doesn't come with audio software licenses.

We have a new DEMO board coming out for the 5253 that shows how to hook the ethernet to this family (51/53).  We plan to give away the schematics for this board, so I'll go ahead and see if I can paste the ethernet circuit to the forum for you, since other aspects of the board are not ready yet.

Also...for future benefit.

The 5253 has a linux BSP and Uboot support and that will run on the 5251.
The 537x and 532x family both are MPUs with ethernet and high speed OTG.  The 532x family actually has two dedicated USB controllers a Host and OTG.  The 537x and 532x require an external ULPI HS PHY, but has the FS (full speed) tranceivers built in.  The 5251/53 have the USB high speed phy built in. 

Depending on your design you may want to compare the features of the 532x/537x family to the 5251/53 because their can be different pricing tradeoffs.  Example buying the ULPI HS PHY may be cheaper than getting a ISA ethernet chipset.  Also the drivers for our internal USB and Ethernet controller are readily available, verses trying to craft something for the external chipset.

Let me know if you need more help... I'll try to get those schematics for you for the 51/53...

Cheers,
-JWW

[Varindra]

Hi,
          We have decided to go ahead with the MCF5251 (which comes with license access to a variety of MP3 encode and decoders) based solution.
As said by you "We have a new DEMO board coming out for the 5253 that shows how to hook the ethernet to this family (51/53).  We plan to give away the schematics for this board, so I'll go ahead and see if I can paste the ethernet circuit to the forum for you, since other aspects of the board are not ready yet.", still I could not get the schematics. Can you please tell where the schematics you have pasted.

Thanks & Regards,
Varindra

[Varindra]

Hi,
          Thank you in advance for pasting the ethernet schematics for the demo board based on MCF5251/53 chipset. In the meanwhile we are going through the comparison of MCF5251/53 based board + external ethernet vs. 537x & 532x based board + Phy. Many guys have said that ISA based ethernet chip from Davicom is as chip as  a Phy from other vendor. Hence we are looking for ISA based solution.

Thanks & Regards,
Varindra