DMA problem

[Alex_CF]

Hi,

On the MCF5485, I initialize the FEC and DMA (with API_DMA given by freescale) to download file by TFTP (It's the frescale dbug application which is on my board, not the evb bord).

My code do this  :

board_dlio_init()

{

     // Initialize the Multi-channel DMA 
   MCD_initDma ((dmaRegs*)(MBAR_ADDRESS+0x8000),
                (void *)MCDAPI_START, // internal SDRAM 32KByte MBAR+10000
                MCD_COMM_PREFETCH_EN | MCD_RELOC_TASKS); //Relocate code in internal SDRAM

   //Enable interrupts in DMA and INTC

  dma_irq_enable(DMA_INTC_LVL, DMA_INTC_PRI);

               // Init FEC

....................................

               // Init DMA

              //Enable the multi-channel DMA tasks
              fec_rx_start(ch, (int8*)fecbd_get_start(ch,Rx)); // witch MCD_startDma
              fec_tx_start(ch, (int8*)fecbd_get_start(ch,Tx)); // witch MCD_startDma

               // start FEC   

        //Enable the Instruction Cache

        mcf5xxx_wr_cacr(0
           | MCF5XXX_CACR_IEC
           | MCF5XXX_CACR_ICINVA);
        
       // Enable interrupts level 7

      board_irq_enable();

}

after when I try to send a broadcast frame, I use the DMA_continu fonction and I have a bus error.

The DMA_continu function enable the ethernet send task in API_DMA

Have you got any suggestions.

Thanks

Alex_CF

[Alex_CF]

Hi,

I've resolved my problem with the fec and the dma. It was the SDR SDRAM configuration, my burst lenght

wasn't good so when the DMA try to read or write the buffer description from ot to  the SDRAM, it's FALSE. And created a bus error.

Thanks for all your answers

Good bye

Alex_CF

[mnorman]

Alex_CF,

Make sure that your buffer descriptor ring and buffers meet the proper alignment restrictions.

-mnorman

[mjbcswitzerland]

Hi Alex_CF

I haven't used the MCF5485 so will not try to analyse the code.

However a bus error will probably occur if the DMA controller doesn't have the privilege to access the resources it is trying to access.

If it is from RAM, look at the RAMBAR settings (or other related ones) to see whether the DMA controller has been allowed to access RAM.

If it is from FLASH, check FLASHBAR (if there is one in the device) and other similar controller settings. If the DMA controller is accessing FLASH it may be necessary to use its backdoor address rather that its direct address (this is the case for the Coldfire devices that I work with - M5223X and M5213).

Maybe you will find something there. It can be quite tricky to work out what is blocking so be prepare to experiment with the debugger or search for reference initialisation code for your device.

Regards

Mark Butcher
www.mjbc.ch / www.uTasker.com