Benchmark tests for the M5223X

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Benchmark tests for the M5223X

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mjbcswitzerland
Specialist V
Hi All

Using the M52235EVB I have performed 2 benchmark tests using our uTasker project.

The first is to test a low power task which controls the switching of the processor to a stop state whenever this is possible.

The second is a UDP echo test of 512 and 1024 byte packets with a buffer copy in the middle. Then depending on the project configuration, the memory copies are performed using the DMA controller and / or tight loops and calculations are performed in SRAM rather than directly in FLASH. The reaction times were measured for various steps in the process and also the code/SRAM implicatiosn of each solution were monitored.

A draft benchmark report is available at http://www.uTasker.com/docs/uTasker/uTaskerBenchmarks.PDF

I would welcome any comments or comparison figures!!

It is obvious from the measurements that the algorithm used for the calcualtion of the check sum over the UDP data (when not deactivated) is critical for reaction time. Any ideas??

Regards

Mark Butcher



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Jaux
Contributor I
Hello Mark -

I have been following your work on the M52235 with interest, and your document ( http://www.uTasker.com/docs/uTasker/uTaskerBenchmarks.PDF) makes good reading.

We develop Industrial Terminals and Controllers of various flavours - and at the moment I am doing the final evaluation on the M5223x chip, spesifically around a subset of 802.3 we use in communicationg from the terminals to the Master Controller.

We are using Embedded Forth ( SwiftX from Forth Inc) and I would like to replicate your tests using our version of UDP within Forth kernel.

The silly season is upon us, and I will look into this early in the new year.

Let me know if you are interested.

With kind regards,

John Ulyate
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mjbcswitzerland
Specialist V
Hi John

Cool!!

Tell me once you have something set up. It will be interesting to see how things compare and get ideas about optimsations.

Regards

Mark
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