A question about using non-multiplexed mode for the Flexbus

[JeffC]

I have a question about any limitations there might be in using non-multiplexed mode versus multiplexed mode for the Coldfire Flexbus.

We are in the design phase of a new circuit board that uses an MCF5485 CPU. We won't be using the PCI bus so would like to use non-multiplexed mode to eliminate the need for an address latch. The issue is, there are sections of the MCF5485 reference manual (Rev. 4) that seem to suggest that non-multiplexed mode is more limited in terms of the number of address and data lines that can be used at any one time. For instance, in the section on Bus Cycle Multiplexing in chapter 17, all of the figures that illustrate basic read and write cycles always show a net total of 32 address and data lines when non-multiplexed mode is used, ie, 16 Address with 16 data lines, or 24 address and 8 data lines. There is also a line in the description of Figure 17-16 that says "Notice that when the device port size is 32 bits, the only mode the bus supports is multiplexing address and data lines."

Am I misunderstanding something, or is the Flexbus really more limited in non-multplexed mode?

Thanks!

Message Edited by JeffC on 2007-06-20 06:16 PM

[Martin_]

MCF548X Flexbus supports operation with the following:

 1.Non-multiplexed 32-bit address and 32-bit data (32-bit address muxed over
   PCI bus–PCI not usable)
 2.Multiplexed 32-bit address and 32-bit data (PCI usable)
 3.Multiplexed 32-bit address and 16-bit data
 4.Multiplexed 32-bit address and 8-bit data

as it is described in section 1.4 of the MCF548X Reference Manual.

During reset, the FlexBus can be configured to operate in a non-multiplexed 32-bit address with 32-bit data mode. In this mode, the 32-bit FlexBus AD[31:0] is used for the data bus, and the PCI bus PCIAD[31:0] is used as the address bus.
Section 2.2.6 Reset Configuration Pins of the Reference Manual describes that.

If the FlexBus is configured to operate in a multiplexed mode during reset, then the full 32-bit address will always be driven on the first clock of a bus cycle on AD lines.
Some AD lines will be used later during the data phase for data.
Which AD lines is determined by the port size programmed in corresponding chip select configuration register CSCRn.

[Manju]

Hi,

I'm using MCF5485.i want to activate DE1 so,i should activate PCIAD2 as 1 and BG4 as 1.I make BG4 as 1.But dunno how to activate AD2.Will anyone please help me how to activate only that AD2(G26) to activate my external device????

Message Edited by Manju on 2009-03-13 12:19 PM