t2081 codewarrior jtag issue

[sabeer]

Hi NXP team and contributors,

I am using t2081 custom board and from codewarrior running bareboard project
when running the program initially I am getting an error
CCSprotocolPlugin: Failed to reset the target

[CCS last error: T2080: Core not responding]

help me in solving it

[sabeer]

Dear Yipingwang,
thank you for your quick response,
it was a hardware issue which is fixed

[yipingwang]

It seems that there is no valid RCW on your custom board, please refer to "4.6.4.1.2 RCW Settings for Hard-Coded Options" in T2080RM.pdf to configure your target board as hard-coded RCW.

Then in CodeWarrior IDE, please create a SRAM launching project to connect to the target board to  avoid DDR controller initialization.

[sabeer]

Dear yipingwang,
now facing the issue,
CCSProtocolPlugin : Failed to correctly configure the JTAG chain.

i have tried using hardcoded rcw from t2080rm as well as default T2081 rcw file.

i am sharing the document of the steps followed for project creation and the error i am getting
Help me in resolving it.

[yipingwang]

In CodeWarrior IDE, please don't use JTAG configuration file to override RCW on the target board. Because the JTAG configuration is only used for the demo board, you need to customize it.

The simple way is to configure the switch settings on the custom board to configure the target board as hard-coded RCW. Then use CodeWarrior to connect to your custom board.

If your problem persists, please send the the following CCS commands result to me to do more investigation.

After configuring the target board as hardcoded RCW, and open the

CodeWarrior Connection Server from

C:\Freescale\CW_PA_v10.5.1\PA\ccs\bin\ccs.exe and type the following

commands.

(bin) 49 % delete all

(bin) 50 % config cc cwtap

(bin) 51 % show cc

0: CodeWarrior TAP (cwtap:10.193.20.66) CC software ver. {0.0}

(bin) 52 % ccs::config_chain t2080

(bin) 53 % ccs::reset_to_debug

[sabeer]

Dear Yipingwang,

below attached is the output image of the commands you shared.

[sabeer]

Hi yipingwang,

please find information regarding fpga reset logic,

kindly suggest us modifications if required.

[yipingwang]

Please refer to "Figure 3. JTAG interface connection" in https://www.nxp.com.cn/docs/en/application-note/AN4804.pdf.

Please make sure you could get similar waveform as page 3 in the attached document.

[sabeer]

Dear Yipingwang,
thanks for your quick response,

we are still getting the error failed to correctly the jtag chain.

we cross verified your design with the ppt.

below attached are the images for reset sequences.

[yipingwang]

It seems that no problem with JTAG interface design.

Please refer to "Figure 4-1. Power-on reset sequence" in T2080RM.pdf to check the timing diagram of the POR sequence on your custom board.

[sabeer]

Dear yipingwang,

when powering on the processor Hrst is continously low, we have kept 4.7k pullup resistor at hrst pin still it is always low

our resets are connected to fpga, we tried driving hrst to high from fpga but the output is 1.1v

we have tried changing resistor values 1k and 75ohms but still same problem remains

kindly suggest us modifications

i am attaching a part of schematics relating to hrst

[yipingwang · Accepted solution]

Please refer to "4.3 Power-on reset recommendations" in https://www.nxp.com.cn/docs/en/application-note/AN4804.pdf

In addition, please make sure that you have configured the switch setting on your target board to make the target board booting from hard-coded RCW.