"CCS ProtocolPlugin::Failed to reset the target" error

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

"CCS ProtocolPlugin::Failed to reset the target" error

Jump to solution
4,883 Views
kavitamathur
Contributor II

Hi,

 

When I start downloading SmartDSP demo project on PSC9132QDS board using CW SC 10.2.12, I am getting "Falied to resume target process, CCSProtocolPlugin:Failed to rest the target".

 

I have tested CCS configuration using test project with PSC9132_SC target, it is working fine (it halts on main()). But When I create test project with PSC9132 target, it gives same error as mentioned above.

 

 

Is anybody facing same issue?

 

Please help me to resolve this issue.

 

Thanks & Regards,

Labels (1)
Tags (1)
1 Solution
2,596 Views
marius_grigoras
NXP Employee
NXP Employee

Now it's obviously that your board is not working in full chain mode (both PA and SC).

Thank you for details.

So, I will be more verbosely for SW10 details JTAG MODES SW10[7:8]:

2'b00 - JTAG_COP => PA_TAP => DSP_TAP

     - this is our default in CodeWarrior and is daisy-chain mode - both PA and SC) - more exactly this option means that you can have a full chain mode using the PA_TAP jtag port and the DSP_TAP is used through PA_TAP.

     - for this you must to use PSC9132 target (for CW SC) and test_cache_core0_PSC9132_download launch (for CW PA)

2'b01 - reserved (not used)

2'b10 - JTAG_COP => PA_TAP

     - this is for PA_TAP (you'll be able to debug only the PA cores -- no access for DSP cores)

2'b11 - JTAG_EONCE => DSP_TAP; JTAG_COP => PA_TAP

     - this means that you can have access to both PA and DSP cores but using different probes (one for each type of arhitecture - i.e. one usb tap connect on every JTAG PORT).

My advice is to use the first option (having only one JTAG PORT active for both PA and DSP architectures).

So, please set up the SW10 = 0x88 and double check the JTAG PORT (maybe you inserted the JTAG cable in the JTAG_EONCE - this is for DSP_TAP and you'll have access only at DSP cores).

Regards and let me know the resultds,

Marius

View solution in original post

0 Kudos
11 Replies
2,596 Views
marius_grigoras
NXP Employee
NXP Employee

Hi,

I don't think this issue is related to SmartDSP. Most of all, is related to your board setup.

First of all, please double check your DIP SW settings and your project settings.

More exactly, if you set up the board to work in single chain mode (PA only) please use only the PA debug configuration. Instead, if you set up the board to work in dual chain mode (both SC + PA) please use the full 9132 debug configuration.

Also, please check with "Task Manager" that you don't have any DE.exe zombie process.

Hope this helps,

Marius

0 Kudos
2,596 Views
kavitamathur
Contributor II

Thanks.

I have checked all the DIP SW and Jumper settings.I have set the dual chain mode as I want to use SC JTAG.

I have killed the DE.exe also. But same error is coming.

Regards,

Kavita

0 Kudos
2,596 Views
marius_grigoras
NXP Employee
NXP Employee

Please try next commands from ccs console and let me know the output. You can find the ccs executable in: PA\ccs\bin\ccs.exe .

(bin) 23 % dele a

(bin) 24 % config cc etap:10.171.77.181  //here please note that you must replace with "config cc utap" if the board is set up on utap

(bin) 25 % ccs::config_chain {msc9132 mpc9132}

(bin) 26 % ccs::reset_to_debug

(bin) 28 % ::ccs::all_run_mode

msc9132: debug

msc913xsc: debug

msc913xsc: debug

msc8144tp: debug

sap: debug

mpc9132: debug

p1010: debug

p1010: debug

(bin) 29 % ccs::read_reg 6 30000 1 4

4087

(bin) 30 % disp ccs::read_reg 6 30000 1 4

ccsrbar_cop=0x00000FF7

(bin) 31 % disp ccs::read_reg 6 2032 1 4

    iar=0xFFFFFFFC

(bin) 32 % disp ccs::read_reg 6 2034 1 4

    msr=0x00000000

0 Kudos
2,596 Views
kavitamathur
Contributor II

Hi Marius,

I am running mu project on starcore. This error is coming on starcore. I have executed mentioned commands from CCS console at PA side as well as SC side.Please see the attached snapshot files to find the output.

Thanks & Regards,

Kavita

0 Kudos
2,596 Views
marius_grigoras
NXP Employee
NXP Employee

Hi Kavita,

Please make a try with next DIP SW settings:

SW1 : 0x1C = 00011100SW7 : 0xE6 = 11100110
SW2 : 0x38 = 00111000SW8 : 0x9F = 10011111
SW3 : 0x9D = 10011101SW9 : 0x9D = 10011101
SW4 : 0x90 = 10010000SW10 : 0x88 = 10001000
SW5 : 0x41 = 01000001SW11 : 0x55 = 01010101
SW6 : 0x18 = 00011000SW12 : 0xE0 = 11100000

Where '1' = up/ON

Also, I need to make a appreciation: When you are trying PSC9132 target (this means full chain - both SC and PA targets) you need to have the SW and jumpers according.

Please let me know the results,

Marius

0 Kudos
2,596 Views
kavitamathur
Contributor II

Hi Marius.

My DIP SW settings are same except SW10 (0x88). The error is same with these settings also.

As per the User guide last two bits of SW10 shows JTAG_Topology.

SW10(7:8) - 00 - JTAG_COP => PA_TAP => DSP_TAP

                   01 -Reserved

                    10 -JTAG_COP => PA_TAP

                    11 - JTAG_EONCE =>DSP_TAP;JTAG_COP=>PA_TAP

So, I understand for full chain, SW10(7:8) should be 11. In that case my SW10 is 0x8B.  But I have got this error "failed to reset target".

The default setting is 0x8A for SW10.

Please correct me if I have done any wrong setting.

Thanks & Regards,

Kavita

0 Kudos
2,596 Views
kavitamathur
Contributor II

Hi Marius,

I would like to add one more observation on CW SC 10.2.12. There are two target are shown for PSC9132:

1. PSC9132_SC

2. PSC9132

I have created two test projects (test1_PSC9132SC and test2_PSC9132) with these targets.

When I debug test1_PSC9132SC project , it works fine. But when I debug test2_PSC9132 project, it gives "Failed to reset target" error.

Same exercise  I have done at PA side on CW PA 10.1.2. There is only one target shown for 9132 : PSC9132. There are two Launch files test_cache_core0_PSC9132_download and test_cache_core0_PSC9132PA_download.

When I choose test_cache_core0_PSC9132PA_download, it works fine. But There is CCS error when I debug with test_cache_core0_PSC9132_download. The error is "CCSProtocolPlugin:: Could not connect to the requested core core# 0".

I hope this observation may give some clue.

Please let me know if any settings issue.

Thanks & Regards,

Kavita

2,597 Views
marius_grigoras
NXP Employee
NXP Employee

Now it's obviously that your board is not working in full chain mode (both PA and SC).

Thank you for details.

So, I will be more verbosely for SW10 details JTAG MODES SW10[7:8]:

2'b00 - JTAG_COP => PA_TAP => DSP_TAP

     - this is our default in CodeWarrior and is daisy-chain mode - both PA and SC) - more exactly this option means that you can have a full chain mode using the PA_TAP jtag port and the DSP_TAP is used through PA_TAP.

     - for this you must to use PSC9132 target (for CW SC) and test_cache_core0_PSC9132_download launch (for CW PA)

2'b01 - reserved (not used)

2'b10 - JTAG_COP => PA_TAP

     - this is for PA_TAP (you'll be able to debug only the PA cores -- no access for DSP cores)

2'b11 - JTAG_EONCE => DSP_TAP; JTAG_COP => PA_TAP

     - this means that you can have access to both PA and DSP cores but using different probes (one for each type of arhitecture - i.e. one usb tap connect on every JTAG PORT).

My advice is to use the first option (having only one JTAG PORT active for both PA and DSP architectures).

So, please set up the SW10 = 0x88 and double check the JTAG PORT (maybe you inserted the JTAG cable in the JTAG_EONCE - this is for DSP_TAP and you'll have access only at DSP cores).

Regards and let me know the resultds,

Marius

0 Kudos
2,596 Views
kavitamathur
Contributor II

Yes.I am using 2'b00 - JTAG_COP.

I have also tested 2'b11. I am able to debug the project at both CW_PA as well as CW_SC.

Thanks for your help.

Regards,

Kavita

2,598 Views
kavitamathur
Contributor II

Thanks a lot..Marius...

Now it started working in daisy chain mode. But I am wondering why full chain mode is not working.

This problem is due to hardware issue or some other problem. Please give you input, so we can ask hardware support.

Thanks & Regards,

Kavita

0 Kudos
2,598 Views
marius_grigoras
NXP Employee
NXP Employee

Just to be very clear, right now you're using 2'b00 - JTAG_COP, right? In our nomenclature this mode is called daisy-chain or full chain.

Regarding this option 2'b11 - JTAG_EONCE => DSP_TAP; JTAG_COP => PA_TAP (let's call it independent-mode), basically as I just already discussed above, you have 2 different JTAG ports and you can connect to each other using a dfferent CW. I made below a small diagram:

JTAG_EONCE => DSP_JTASG (you must use a usbtap and connect using CW for SC -- please use PSC9132_SC target)

JTAG_COP => PA_TAP (you must use another usbtap and connect using CW for PA -- please use PSC9132_PA target).


You can made this simultaneously from your PC, because 2 different usbtaps and CWs are used.


Please let me know your results,

Marius

0 Kudos