how to change memory size on my MPC8641DHPCN board through code warrior?

[azilcj]

i can not change the dimm from 512M Bto 2GB on my  MPC8641DHPCN board.

i have modified some codes in two places

(1)  8641dhpcn_init_core1.cfg :

# window 1: DDR controller 1

writemem.l 0xf8000c28 0x00000000 # LAWBAR1 - base address = 0X00000000

#writemem.l 0xf8000c30 0x80f0001c # LAWAR1 - DDR controller 1, DDR, 512MB 

writemem.l0xf8000c300x80f0001d # LAWAR1 - DDR controller 1, DDR, 1GB

(2) 8641dhpcn_init_core1.cfg :

writemem.l 0xf8002110 0x42000000 # DDR_SDRAM_CFG

writemem.l 0xf8002000 0x0000001f # CS0_BNDS   512M

writemem.l 0xf8002080 0x80010202 # CS0_CONFIG   

writemem.l 0xf8002008 0x0020003f # CS1_BNDS   512M  wang edit

writemem.l 0xf8002084 0x80010202 # CS1_CONFIG   wang edit

writemem.l 0xf8002104 0x00260802 # TIMING_CFG_0

writemem.l 0xf8002108 0x3935d322 # TIMING_CFG_1

writemem.l 0xf800210C 0x14904cc8 # TIMING_CFG_2

writemem.l 0xf8002118 0x00480432 # DDR_SDRAM_MODE

writemem.l 0xf8002124 0x06180100 # DDR_SDRAM_INTERVAL

writemem.l 0xf8002114 0x04400000 # DDR_SDRAM_CFG2

writemem.l 0xf8002130 0x03800000 # DDR_SDRAM_CLK_CNTL

#writemem.l 0xf8002128 0x12345678 # DDR_SDRAM_data_init 

(3) 8641dhpcn.mem :

range 0x00000000 0x3FFFFFFF 4  ReadWrite   //1GB-DDR

reserved 0x40000000 0xc0000000 

now i can not operate the space outside of 512MB.please give me some advise  .

thank you very much 

[ronco]

First, based on the Target Initialization file name referenced here, 8641dhpcn_init_core1.cfg, I suspect you're working with an older edition of CodeWarrior Dev Studio for Power Architecture.  The latest release is 8.8, with an 8.8.3 Update, available at www.freescale.com/codewarrior.  Please make sure you're using this latest release.

Then to your specific question, the answer depends on several factors:
    - the number of DIMM modules used: 1 x 2GB vs 4 x 512 MB or some other combination
    - the type of DIMM modules used: unbuffered vs registered, single rank vs dual rank modules
    - bank interleaving of memory controller interleaving required

Also please note that other changes might be necessary, for example timings configuration in the DDRC for the new memory.  Information on the DDR Controller configuration registers for the MPC8641D can be found in the MPC8641D Reference Manual.

Finally, there are some Application Notes that can provide useful information for DDR settings, like: AN3939 (DDR Interleaving for PowerQUICC and QorIQ Processors) and AN2583 (Programming the DDR SDRAM Controller).  I hope this helps.

-Ron