Switching from BL2 to BL31 with LX2160A Discrete DDR custom board

[YeongK]

I have a halt problem on switching from BL2 to BL31 with LX2160A Discrete DDR custom board. Last message on UART output is the loading image BL31, BL32, BL33 and the function name and line number. I have attached the Codewarrior probe and found the core is halt on SYNC_EXCEPTION_SP_ELX handling. If I comment out the disable MMU line on  bl2_run_next_image function it goes the BL31 but still fails at first line on bL3 with the permission fault in EL2. I have checked the memory address translation table but the DDR address space is not on the mapping table. Is that OK that not having DDR address translation on the remap table? If it is not, how can I add the DDR address mapping into the table? Any recommendations on debugging this issue?

Thanks in advance for your help.

[yipingwang]

1. You could use QCVS DDRv tool to connect to the custom board to do validation and optimization to get optimized DDR initialization parameters and used them in ATF software. Please refer to DDRv user manual https://www.nxp.com/docs/en/user-guide/QCVS_DDR_User_Guide.pdf.

2. Please refer to the following document to debug ATF software.

https://community.nxp.com/t5/Layerscape-Knowledge-Base/Debugging-ATF-and-u-boot-with-CodeWarrior-for...