Hi,
I try to use spi interface throught /dev/spidev0.0
I have already done:
1. RCW: activate SPI1
bits 396 to 398: 001
402 to 404: 001
2. Device tree:
dspi0: dspi@2100000 {
compatible = "fsl,vf610-dspi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x0 0x2100000 0x0 0x10000>;
interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "dspi";
clocks = <&platform_clk 1>;
spi-num-chipselects = <2>;
big-endian;
tcfq-mode;
status = "enable";};
&dspi0 {
bus-num = <0>;
status = "okay";spidev@0x00 {
compatible = "spidev";
spi-max-frequency = <20000000>;
reg = <0>;};
};
In this configuration, it's possible to see the signals SPI1_SOUT (mosi) and SPI1_SCK (clock) on the oscilloscope.
I use spi-tools to test this:
./spi-config -d /dev/spidev0.0 --mode=3 -s 100000
echo test | ./spi-pipe -d /dev/spidev0.0
However, the SPI1_CS0 (chipselect) stand at low level, thats mean the slave is always selected. In my case, the slave need to have some change on the CS to answer.
Do you have anybody already use spi with the chipselect ?
thank you for your futher answer.
Léonard.
Hello Léonard,
It seems that there is problem with the dts definition, please refer to the following definition from arch/arm/boot/dts/ls1021a.dtsi.
dspi0: dspi@2100000 {
compatible = "fsl,ls1021a-v1.0-dspi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x0 0x2100000 0x0 0x10000>;
interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "dspi";
clocks = <&platform_clk 1>;
spi-num-chipselects = <5>;
big-endian;
status = "disabled";
};
Regarding Chip Select problem with DSPI, please go to u-boot and type the following command under u-boot prompt, then check whether SPI1_CS0 signal is valid.
=>sf probe [[bus:]cs] (eg. =>sf probe 1:0)
If this problem remains, please check the hardware design to find out the root cause.
Have a great day,
TIC
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