Possible bug in __flush_cache

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Possible bug in __flush_cache

774 次查看
emagii
Contributor II

When I generate a project for the MPC5643L I get the file __ppc_eabi_init.c
This contains the __flush_cache routine which starts with (cleaned up a bit):

asm void __flush_cache(register void *address, register unsigned int size)
{
.     nofralloc

.    lis         r5,      0xffff
.    ori        r5, r5, 0xfff1
.    and      r5, r5, r3                 /* make address 8-byte aligned */
.    subf     r3, r5, r3                 /* get unaligned-aligned difference */
.    add      r4, r4, r3                 /* increase size accordingly */

So r5 is loaded with a mask 0xFFFF_FFF1 to make it 8-byte aligned.

Should it not be loaded with 0xFFFF_FFF8 ?

 

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lukaszadrapa
NXP TechSupport
NXP TechSupport

Hi,

yes, I agree, this is obviously a mistake. Thanks for pointing this out, I will report it.

Regards,

Lukas

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