Debug session with T1040 in JTAG chain

[nsutch]

Hi,

We have a previous design with a T1040 processor that we can debug & program the flash use the Codewarrior TAP via JTAG. That design has been updated and the T1040 is now part of a chain with one other device - there are no other changes to the design in the area of the T1040 or NOR flash boot memory.

CCS can correctly display the chain as follows:

TDO -----
               |
               * Device 0 IDCODE: 0682A31F Device: Unknown Device
               * Device 1 IDCODE: 0681001D Device: FSL T1040/T1041 rev 1.x
               |
TDI -----

Is there some guidance on how to modify the configuration files such as the CW JTAG Config output from the QCVS to allow us to connect to the T1040 on the new design? I've had a look around QCVS but can't see anywhere to specificy that the processor is Device 1 in the chain.

Update: Additional info from CCS:

(bin) 12 % config cc cwtap
(bin) 13 % ccs::config_chain testcore
(bin) 14 % jtag::lock
(bin) 15 % jtag::reset_tap 1
(bin) 16 % jtag::reset_tap 1
(bin) 16 % jtag::scan_in dr 256
0x0000000000000000000000000000000000000000000000000681001D0682A31F
(bin) 17 % jtag::unlock
(bin) 18 % ccs::config_chain t1040
(bin) 19 % display ccs:get_config_chain
Chain Position 0: T1040
(bin) 20 % ccs::all_run_mode
t1040: Debug Mode
(bin) 21 % ccs::reset_to_debug

Thanks,

Nick

[nsutch · Accepted solution]

Ok...so I've worked it out. I manually updated JTAG Configuration File exported from QCVS to start:

Generic 11 1 0x7FF
T1040 (2 1) (210001 0x0c10000c)..........[and the rest]

For anyone equally as confused as I was, the numbers after the Generic are <instruct_reg_length> <data_reg_bypass_length> <JTAG_bypass_instruction> which I extracted from the BSDL file of the device. This was answered here: https://community.nxp.com/thread/306285. I just didn't realise it was simpy a case of adding the line above the existing configuration parameters.