DDR Validation test error in T2081 Board

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DDR Validation test error in T2081 Board

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Contributor III

Hello All,
I’m having problems running the CodeWarrior Validation tool on custom hardware, i am using T2081 Based Board.
Problem : We are using discrete DDR3 (MT41K128M16JT-125 XIT:K) 32bit Bus and DDR data rate configured 1066 MT/s in the RCW
and QCVS DDR tool but getting Errors in Code Warrior Validation Tool
"Exception: (<<Core interrupted by exception: Machine check interrupt!>>)" and
"Error configuring the target! - DDR initialization failed: D_INIT was not cleared by hardware".
For Configuration of DDR3 in QCVS DDR tool i am using Data Sheet of the DDR3 and Application Note "AN4039"
System Clock (SCLK) is set to 66.66MHz and Memory Clock (DDRCLK) is set to 133.33MHz on the Processor Properties page.

For Configuration i am using Code Warrior v10.5.1.

Please check the below error logs from Code warrior.

1).

#################### Result for: write_read_compare_test ###### Run  1 #############################
Test was not executed!
Err. capture registers:
0xE20, 0x00000000      0xE24, 0x00000000      0xE28, 0x00000000      0xE40, 0x00000000     
0xE44, 0x00000000      0xE48, 0x0000001D      0xE4C, 0x00000000      0xE50, 0x00000000     
0xE54, 0x00000000      0xE58, 0x00010000      
Dump:
0xF00, 0x00000000      0xF04, 0x00000000      0xF08, 0x00000011      0xF0C, 0x14000C20     
0xF10, 0x00000000      0xF14, 0x00000000      0xF18, 0x00000000      0xF1C, 0x00000000     
0xF20, 0x00000000      0xF24, 0x20000F00      0xF28, 0x0E000D00      0xF2C, 0x00000000     
0xF30, 0x00000000      0xF34, 0x00004000      0xF38, 0x00000000      0xF3C, 0x00000000     
0xF40, 0x00000000      0xF44, 0x00000000      0xF48, 0x08000001      0xF4C, 0x0A000000     
0xF50, 0x1B000B00      0xF54, 0x0B000B00      0xF58, 0x0A000A00      0xF5C, 0x0A000A00     
0xF60, 0x0C000000      0xF64, 0x00000800      0xF68, 0x04444444      0xF6C, 0x44400000     
0xF70, 0x00000000      0xF74, 0x00000000      0xF78, 0x00000000      0xF7C, 0x00000000     
0xF80, 0x00000000      0xF84, 0x00000000      0xF88, 0x00000000      0xF8C, 0x00000000     
0xF90, 0x00000000      0xF94, 0x00000000      0xF98, 0x00000000      0xF9C, 0x00000000     
0xFA0, 0x00000000      0xFA4, 0x00000000      0xFA8, 0x00000000      0xFAC, 0x00000000     
0xFB0, 0x00000000      0xFB4, 0x00000000      0xFB8, 0x00000000      0xFBC, 0x00000000     
0xFC0, 0x00000000      0xFC4, 0x00000000      0xFC8, 0x00000000      0xFCC, 0x00000000     
0xFD0, 0x00000000      0xFD4, 0x00000000      0xFD8, 0x00000000      0xFDC, 0x00000000     
0xFE0, 0x00000000      0xFE4, 0x00000000      0xFE8, 0x00000000      0xFEC, 0x00000000     
0xFF0, 0x00000000      0xFF4, 0x00000000      0xFF8, 0x00000000      0xFFC, 0x00000000     
Data:
0x00000000  
--------------------------------------------------------------------
Exception: (<<Error configuring the target! - DDR initialization failed: D_INIT was not cleared by hardware!>>)
--------------------------------------------------------------------
Target system was initialized 0 times and it took 0.000000 seconds.
Target system effective test execution took 0.000000 seconds.

2).
Err. capture registers:
0xE20, 0x00000000      0xE24, 0x00000000      0xE28, 0x00000000      0xE40, 0x00000000     
0xE44, 0x00000000      0xE48, 0x0000001D      0xE4C, 0x00000000      0xE50, 0x00000000     
0xE54, 0x00000000      0xE58, 0x00010000      
Dump:
0xF00, 0x00000000      0xF04, 0x00000002      0xF08, 0x00000011      0xF0C, 0x14000C20     
0xF10, 0x00000000      0xF14, 0x00000000      0xF18, 0x00000000      0xF1C, 0x00000000     
0xF20, 0x00000000      0xF24, 0x0F000F00      0xF28, 0x0E000D00      0xF2C, 0x00000000     
0xF30, 0x00000000      0xF34, 0x00004000      0xF38, 0x00000000      0xF3C, 0x00000000     
0xF40, 0x00000000      0xF44, 0x00000000      0xF48, 0x08000001      0xF4C, 0x8C000000     
0xF50, 0x0C000B00      0xF54, 0x0B000B00      0xF58, 0x0A000A00      0xF5C, 0x0A000A00     
0xF60, 0x0C000000      0xF64, 0x00000800      0xF68, 0x04444444      0xF6C, 0x44400000     
0xF70, 0x00000000      0xF74, 0x00000000      0xF78, 0x00000000      0xF7C, 0x00000000     
0xF80, 0x00000000      0xF84, 0x00000000      0xF88, 0x00000000      0xF8C, 0x00000000     
0xF90, 0x00000000      0xF94, 0x00000000      0xF98, 0x00000000      0xF9C, 0x1B001B00     
0xFA0, 0x1C001B00      0xFA4, 0x00000000      0xFA8, 0x00000000      0xFAC, 0x00000000     
0xFB0, 0x00000002      0xFB4, 0x0F0F0F11      0xFB8, 0x10100F0E      0xFBC, 0x0F0E0F10     
0xFC0, 0x0F0F0F0F      0xFC4, 0x0F101011      0xFC8, 0x10101010      0xFCC, 0x0F100F10     
0xFD0, 0x0E10100F      0xFD4, 0x0F0F0F0F      0xFD8, 0x0F0F0F0F      0xFDC, 0x0F0F0F0F     
0xFE0, 0x0F0F0F0F      0xFE4, 0x0F0F0F0F      0xFE8, 0x0F0F0F0F      0xFEC, 0x0F0F0F0F     
0xFF0, 0x0F0F0F0F      0xFF4, 0x0F0F0F0F      0xFF8, 0x0F0F0F0F      0xFFC, 0x00000000     
Data:
0x00000000  
--------------------------------------------------------------------
Exception: (<<Core interrupted by exception: Machine check interrupt!>>)
--------------------------------------------------------------------
Target system was initialized 1 times and it took 2.331000 seconds.
Target system effective test execution took 0.000000 seconds.


I don't know what is causing the problem.
Help me in resolving this issue.

Thanks & Regards,

Anshul Khare

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1 Reply

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NXP TechSupport
NXP TechSupport

Hello nshul Khare,

First of all regarding how to use QCVS DDRv tool, if there is no SPD on your target board, please create a QCVS DDR project with the default configuration, then modify DDR Properties panel according to your DDR data sheet, please make sure the related frequency configuration in DDRv project is the same as the target board.

I checked registers values captured you, it seems they were not the real status when the error occurred. If the error "D_INIT was not cleared by hardware" occurs, as usual  ACE bit of DDR_ERR_DETECT(0x00008E40) should be set. Would you please refer to the following procedure to capture the CCS console log to me?

When you use DDRv tool to connect to the target board, CodeWarrior connection Sever will be invoked automatically, please open it at the right bottom of the task bar, then type command "log v" in CCS console. In CodeWarrior IDE, please connect to the target board again, the low level communication log between DDRv and the target board will be captured in the CCS console, please click "Start Validation", then capture the CCS log and send it to me to do more investigation.

If DDR_ERR_DETECT[ACE] is set, the following is the proper reason.

  1. The training sequence that the controller follows to calibrate the read data path was not able to complete. This would probably only happen if there was a hard failure on the memory interface caused by board-level issues or incorrect controller settings.
  1. Incorrect termination of MDICx signals.
  1. Write leveling calibration was not able to complete. This relates to improper settings of the DDR_WRLVL_CNTL register or board-level issues.

 

 

Thanks,

Yiping

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