Core can access host via ping but u-boot cannot. Why?

[abdul2]

Hi,

Here is my setting:

Codewarrior TAP is connected to JTAG port on the board (P3041).

CW TAP is connected to serial port of board.

CW TAP is connected to the host computer via USB.

Using putty, I've connected to CW TAP core console and u-boot console (through using CW TAP IP and port 1082).

I want to flash linux image via u-boot/tftp but u-boot console cannot ping to host computer. However, in core console, ping works correctly. Am I forgetting anything such as connecting target board and host computer via Ethernet? I did it too but no way. What should I do?

Thanks in advance...

[addiyi]

You could try to use one by one different eth interfaces (FM1@DTSEC1, FM1@DTSEC2, FM1@DTSEC3, FM1@DTSEC4, FM1@DTSEC5, FM1@TGEC1) to see what is the correct one. Now FM1@DTSEC5 is used.

You can use "edit ethact" command in uboot to change the eth used. After changing the eth, try the ping command.

Adrian

[abdul2 · Accepted solution]

Thanks for your response. The problem was with Windows's 0.0.0.0 gateway bug. I couldn't solve the bug but I've found a workaround.

[addiyi]

Please share printenv output from uboot console.

Adrian

[abdul2]

Here is boot messages, printenv output and response when I try to ping to my host computer:

U-Boot 2013.01-00115-g831b30d (Jun 15 2013 - 03:42:23)

CPU0: P3041E, Version: 2.0, (0x82190320)
Core: E500MC, Version: 3.2, (0x80230032)
Clock Configuration:
CPU0:1500 MHz, CPU1:1500 MHz, CPU2:1500 MHz, CPU3:1500 MHz,
CCB:750 MHz,
DDR:666.667 MHz (1333.333 MT/s data rate) (Asynchronous), LBC:93.750 MHz
FMAN1: 583.333 MHz
QMAN: 375 MHz
PME: 375 MHz
L1: D-cache 32 kB enabled
I-cache 32 kB enabled
Reset Configuration Word (RCW):
00000000: 12600000 00000000 241c0000 00000000
00000010: d8984a01 03002000 de800000 41000000
00000020: 00000000 00000000 00000000 10070000
00000030: 00000000 00000000 00000000 00000000
Board: P3041DS, Sys ID: 0x20, Sys Ver: 0x02, FPGA Ver: 0x03, vBank: 0
SERDES Reference Clocks: Bank1=100Mhz Bank2=125Mhz Bank3=125Mhz
I2C: ready
SPI: ready
DRAM: Initializing....using SPD
Detected UDIMM i-DIMM
2 GiB left unmapped
4 GiB (DDR3, 64-bit, CL=9, ECC on)
DDR Chip-Select Interleaving Mode: CS0+CS1
Testing 0x00000000 - 0x7fffffff
Testing 0x80000000 - 0xffffffff
Remap DDR 2 GiB left unmapped

POST memory PASSED
Flash: 128 MiB
L2: 128 KB enabled
Corenet Platform Cache: 1024 KB enabled
SRIO1: disabled
SRIO2: disabled
NAND: 512 MiB
MMC: FSL_SDHC: 0
EEPROM: NXID v1
PCIe1: Root Complex, no link, regs @ 0xfe200000
PCIe1: Bus 00 - 00
PCIe2: disabled
PCIe3: Root Complex, no link, regs @ 0xfe202000
PCIe3: Bus 01 - 01
PCIe4: disabled
In: serial
Out: serial
Err: serial
Net: Initializing Fman
Fman1: Uploading microcode version 106.1.9
PHY reset timed out
PHY reset timed out
PHY reset timed out
PHY reset timed out
FM1@DTSEC1, FM1@DTSEC2, FM1@DTSEC3, FM1@DTSEC4, FM1@DTSEC5 [PRIME], FM1@TGEC1
Hit any key to stop autoboot: 0
=> printenv
baudrate=115200
bootcmd=setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;bootm e8020000 e9300000 e8800000
bootdelay=3
consoledev=ttyS0
eth0asetesetenv=eth4addr 00:04:9F:03:13:4C
eth1addr=00:E0:0C:02:01:DD
eth2addr=00:E0:0C:02:02:DD
eth3addr=00:E0:0C:02:03:DD
eth4addr=00:E0:0C:02:04:DD
eth5addr=00:04:9F:03:13:4D
ethact=FM1@DTSEC5
ethaddr=00:E0:0C:02:00:DD
ethprime=FM1@DTSEC5
fman_ucode=0xeff40000
gatewayip=192.168.0.1
hvboot=setenv bootargs console=ttyS0,115200 config-addr=0xfe8900000;bootm 0xfe8700000 - 0xfe8800000
hwconfig=fsl_ddr:ctlr_intlv=cacheline,bank_intlv=cs0_cs1;fsl_fm1_xaui_phy:xfi;usb2:dr_mode=peripheral,phy_type=utmi;usb1:dr_mode=host,phy_type=utmi
ipaddr=192.168.0.2
loadaddr=1000000
netdev=eth0
netmask=255.255.255.0
sataboot=setenv bootargs root=/dev/sda1 rootdelay=5 rw console=$consoledev,$baudrate $othbootargs;bootm e8020000 - e8800000
serverip=192.168.0.1
stderr=serial
stdin=serial
stdout=serial

Environment size: 1005/8188 bytes
=> ping 192.168.0.1
FM1@DTSEC5 Waiting for PHY auto negotiation to complete.......user interrupt!
FM1@DTSEC5: No link.
Using FM1@TGEC1 device
ping failed; host 192.168.0.1 is not alive

By the way, ethernet connection through crossover cable between target board and host computer is required, isn't it? Or do they communicate through CW TAP for tftp download/upload?

[addiyi]

Cable between board and host PC is required. CWTAP knows only to root the serial output of the board to its port 1082.

Adrian

[abdul2]

OK. I've already connected them via crossover cable and adjust the settings. The output above comes while the pyhsical ethernet connection exists. I've set my computer's settings as ip 192.168.0.1, netmask 255.255.255.0, gateway 192.168.0.1 and the board's settings as ipaddr 192.168.0.2, netmask 255.255.255.0, gatewayip 192.168.0.1. Both of them cannot ping to each other. What is the problem? Do you have any idea? Thanks.

P.S: I've tried both RJ45 ports in board and set the switches to default settings of P3041 as shown in P5040/P5020/P3041DS (SuperHYDRA) hardware getting started guide.