Hi,
Starting with the next GA release, we have simplified a lot the RCW override procedure for board recovery and all the details are included in the Targeting Manual. Unfortunately till then you'll need to make the next manually steps:
1. Set the DIP SW settings to RCW harcoded (SW3 + SW4 )+ SYSCLK 83.333Mhz (as forced by RCW HARDCODED) (SW7[1:3]) - take a look in the board manual
2. Using ccs from Common folder, disable rcw9 (bit HOLD_OFF). An example bellow:
config cc cwtap:10.232.136.60
ccs::config_server 0 1000
ccs::config_chain {ls2085a sap2}
disp ccs::read_reg 0 0x1008 4
rcw9=0x00000370 rcw10=0x00003201 rcw11=0x00000000 rcw12=0x00000000
ccs::write_reg 0 0x1008 0x170
disp ccs::read_reg 0 0x1008 4
rcw9=0x00000170 rcw10=0x00003201 rcw11=0x00000000 rcw12=0x00000000
ccs::config_template 0 0x1000 1
ccs::reset_to_debug
3. start to play with FP (for QDS need to disable the reset_to_debug from flash py script for using the same ccs already open). Details in the Targeting manual, my used fp commands for writing the RCW/pbl and u-boot are also bellow:
mon flash erase offset 0x0 size 188
mon flash write binary C:\flash_images\PBL_0x2a_0x41_1333.bin offset 0x0
mon flash erase offset 0x100000 size 535880
mon flash write binary C:\flash_images\u-boot-ls2085ardb_config-2015.01+git-r0.bin offset 0x100000
4. sw back the dip sw settings to defaults (for booting from NOR)
Regards,
Marius