CW won't debug T4240QDS: fails to reset target

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CW won't debug T4240QDS: fails to reset target

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kristinkrueger
Contributor II

Hello,

 

we are trying to run the baremetal example program of CW on the T4240. Whenever we try to start a debug session under Win 7, we get the following error message:

CCSProtocolPlugin: Failed to reset the target

CCS last error: HRESET occured during transaction.

Any clues on how to resolve this issue? We already updated the firmware on the Codewarrior TAP we are using. CW version is 10.4.0, Build ID 140709.

 

Any help will be highly appreciated.

 

Regards,

Kristin Krüger

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yipingwang
NXP TechSupport
NXP TechSupport

Hello Kristin,

Previously some customers have already reported similar problem, this problem is caused by FPGA. I also can reproduce your problem on T4240QDS target board with FPGA v6.

The workaround is downgrading and loading FPGA v5 to the target board.

Please use the following procedure to downgrad FPGA.

  1. Go to http://www.microsemi.com/products/fpga-soc/design-resources/programming/flashpro#downloads and download FlashPro.
  2. Install FlashPro on PC
  3. Connect FlashPro4 programmer between board and PC
  4. Power On the board
  5. Open FlashPro software
  6. Create a New Project
  7. Click on Configure Device and Browse to load programming file (the one attached)
  8. Click Run
  9. Wait until the programming is done


Have a great day,
Yiping

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ronco
NXP Employee
NXP Employee

An easier solution to this problem is to use the CodeWarrior PA10 Debugger's "Reset delay" feature, and set it to a value of 2000.  This feature waits 2 seconds (2000 milliseconds) after resetting the target board before proceeding with its target initialization, allowing the T4240QDS to complete the background programming performed by the FPGA during Reset.  Back-revving the FPGA is not necessary.

Information about the "Reset delay" feature is found in Section 5.3 'Connection types' of the "Targeting_PA_Processors" manual, found in the 'Help' folder of your CodeWarrior PA10 installation.  This document can also be found on www.freescale.com as CWPADBGUG .

Ron

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yipingwang
NXP TechSupport
NXP TechSupport

Hello Kristin,

Previously some customers have already reported similar problem, this problem is caused by FPGA. I also can reproduce your problem on T4240QDS target board with FPGA v6.

The workaround is downgrading and loading FPGA v5 to the target board.

Please use the following procedure to downgrad FPGA.

  1. Go to http://www.microsemi.com/products/fpga-soc/design-resources/programming/flashpro#downloads and download FlashPro.
  2. Install FlashPro on PC
  3. Connect FlashPro4 programmer between board and PC
  4. Power On the board
  5. Open FlashPro software
  6. Create a New Project
  7. Click on Configure Device and Browse to load programming file (the one attached)
  8. Click Run
  9. Wait until the programming is done


Have a great day,
Yiping

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

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aloishahn
Contributor III

Hi Yiping,

is fpga downgrade from v6 to v5 still valid? or is a more recent (later than v6) fpga version available?

regards

Alois

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addiyi
NXP Employee
NXP Employee

Hi Alois,

You should downgrade the fpga from v6 to v5 in order to have CW working for your T4240QDS board. No fpga later than v6 is available.

Adrian

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aloishahn
Contributor III

addiyi

Just to be sure.

For fpga programming I need a microsemi jtag adapter FlashPro4/FlashPro5? Or can I use other jtag adpaters (like CW TAP, USB-Blaster, ...)?

What is the right connector on the qds board, same as for CW TAP?

thanx

Alois

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addiyi
NXP Employee
NXP Employee

You need the Actel FlashPro (3 or 4) and the  FlashPro software installed on you PC. The right connector is J38 (jtag_prog, it's a 10 pins connector) from the qds board.

Adrian

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aloishahn
Contributor III

OK, thanks

Alois

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aloishahn
Contributor III

Hi Adrian,

FPGA downgrade from v6 to v5 solved my problem as well.

Alois

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kristinkrueger
Contributor II

Hello Yiping and Adrian,

thank you for your replies! When the FlashPro programmer arrives, I'll be able to see if this works for me. My FPGA version is v6, so hopefully this resolves my issues.

Where is the programming file attached?

Regards,

Kristin

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addiyi
NXP Employee
NXP Employee

Attached is the file necessary for downgrade.

Adrian

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kristinkrueger
Contributor II

Thank you all for your help, this error has disappeared.

Regards,

Kristin

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lunminliang
NXP Employee
NXP Employee

What’s the silicon version on your board, rev1.0 or 2.0?

First please make sure you set the board switch according to the board document, and you are using a  valid RCW.

If you still could not connect, please open CCS.exe and try below command, see what’s the result:

% findcc cwtaps

%config cc cwtap

%ccs::config_chain t4240

%ccs::reset_to_debug

%ccs::all_run_mode


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kristinkrueger
Contributor II

Thank you for your reply!

It's rev 2.0. My current switch settings are:

SW1 : 0x17 = 00010111     SW2 : 0xFE = 11111110     SW3 : 0x0C = 00001100   SW4 : 0x50 = 01010000
SW5 : 0xE2 = 11100010     SW6 : 0x0F = 00001111     SW7 : 0xFA = 11111010   SW8 : 0xCD = 11001101

SW9 : 0x1F = 00011111

The RCW is:

       00000000: 16070019 18101916 00000000 00000000

       00000010: 04383060 30548c00 ec020000 f5000000

       00000020: 00000000 ee0000ee 00000000 000307fc

       00000030: 00000000 00000000 00000000 00000028

Which differs from the proposed default RCW:

Default RCW:

   

    00000000  16070019 0c101912 00000000 00000000

    00000010  04383060 30548c00 fc020000 19000000

    00000020  00000000 ee0000ee 00000000 000307fc

    00000030  00000000 00000000 00000000 00000010

What is causing the difference?

CCS gave me:

(bin) 2 % findcc cwtaps

FSL02BC5E (00:04:9f:02:bc:5e): CodeWarrior TAP

  Power Architecture JTAG/COP Probe Tip

  Boot Loader v1.0.1

  Operating System v1.0.1

(bin) 3 % config cc cwtap

(bin) 4 % ccs::config_chain t4240

(bin) 5 % ccs::reset_to_debug

T4240: HRESET occurred during transaction

(bin) 6 % ccs::all_run_mode

t4240: Debug Mode

e6500_thread0: Execute Mode

e6500_thread1: Disabled Mode

e6500_thread0: Execute Mode

e6500_thread1: Disabled Mode

e6500_thread0: Execute Mode

e6500_thread1: Disabled Mode

e6500_thread0: Execute Mode

e6500_thread1: Disabled Mode

e6500_thread0: Execute Mode

e6500_thread1: Disabled Mode

e6500_thread0: Execute Mode

e6500_thread1: Disabled Mode

e6500_thread0: Execute Mode

e6500_thread1: Disabled Mode

e6500_thread0: Execute Mode

e6500_thread1: Disabled Mode

e6500_thread0: Execute Mode

e6500_thread1: Disabled Mode

e6500_thread0: Execute Mode

e6500_thread1: Disabled Mode

e6500_thread0: Execute Mode

e6500_thread1: Disabled Mode

e6500_thread0: Execute Mode

e6500_thread1: Disabled Mode

(bin) 7 %

The HRESET occured there,too.

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addiyi
NXP Employee
NXP Employee

Please verify in uboot console the FPGA version. If this is v6, then is a known issue and you should downgrade the FPGA version to v5 (using the steps provided by Yiping Wang).

Adrian

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