Link error: L1907: Fixup overflow in . . . .

[Adam]

I have the following error:
Link error: L1907: Fixup overflow in C2_ROM, to MAIN_9800 type 3, at offset 0xBB.

Basically, I have two projects that use the same source files. Project 1 uses all assembly code and it is relocatable. This project assembles, installs and runs with no problems. I've broken the code up into non-banked ROM into two segments (see attached PRM file).

Project 2 uses most of the assembly source files from the project above (not duplicates, the same files). I have a mix of C and Assembly in this project. If I build the project without it jumping or calling a label from the project 1 files, then it will compile, install and run without the assembly files linked/loaded into ROM. If I do try to "jump" or branch or call a label to one of the labels from project 1's source, then I get the error above.

So basically, I have 2 projects with the same PRM file. Each project has specific (different) source code to go into 0xC000 TO 0xC7FF and the exact same source code for 0xC800 TO 0xFEFF. The all assembly project links and runs fine, the c and assembly mixed project does not.

Attached is the PRM file for project 2 (project 1 is indetical except that it declares some interrupt vectors), but the ROM/RAM setup is the same.

As far as I can tell, there is no overflow of ROM space. Can someone please advise? Also, I've looked at the map file and see nothing that indicates a ROM overflow.

In essence, what I am trying to do is have 0xc000 to 0x7fff be code that can change independent of the code in 0xc800 to 0xfeff. That way the code in 0xc000 to 0x7fff can change without the code starting at 0xc800 changing.

=============================
SEGMENTS
/* RAM on the 9xs12gc32 */
BR_RAM = READ_WRITE 0x0800 TO 0x0EFE;
BR_STK = NO_INIT 0x0EFF TO 0x0FFF;

/* External RAM to be used on the Pump Board */
EXTERNAL_RAM = READ_WRITE 0x4000 TO 0x6000;

/* Main ROM map broken into segments for easy software upgrade */
// ROM_C000 = READ_ONLY 0xC000 TO 0xFEFF;
ROM_C1 = READ_ONLY 0xC000 TO 0xC7FF;
ROM_C2 = READ_ONLY 0xC800 TO 0xFEFF;

/* banked FLASH ROM */
PAGE_3D = READ_ONLY 0x3D8000 TO 0x3DBFFF;
END

PLACEMENT
_PRESTART, /* Used in HIWARE format: jump to _Startup at the code start */
STARTUP, /* startup data structures */
STRINGS, /* string literals */
VIRTUAL_TABLE_SEGMENT, /* C++ virtual table segment */
DEFAULT_ROM, NON_BANKED, /* runtime routines which must not be banked */
COPY, /* copy down information: how to initialize variables */
INTO ROM_C1;

C2_ROM_VAR, /* C2 Constant Variables */
C2_ROM /* C2 ROM */
INTO ROM_C2;

C2_RAM INTO EXTERNAL_RAM;

DEFAULT_RAM,
INTERNAL_RAM INTO BR_RAM;

[Adam · Accepted solution]

I got it fixed.

I had a branch from one file into another. Files would evaluate to the same section of ROM space, but apparently the JMP works better, why I can't say at the moment.

[CompilerGuru]

A BRA (or BNE/..../BSR) has a max branch distance of -128..+127 computed from the address after the BRA.
The error states that the branch instruction at C2_ROM+0xBA cannot reach MAIN_9800, its too far away.

Daniel

[CrasyCat]

Hello

My guess is that you are placing code in non-contiguous memory area in your .prm file.

Something like:
  DEFAULT_ROM       INTO ROM_C000, ROM_4000

If this is the case, you have to tell the compiler not to optimize JSR with BSR while building code.

when building in Small memory model, compiler will try to replace all JSR with BSR instruction. This obviously can generate some trouble when a code section is allocated on two non-consecutive memory block.

Just add option -OnB=b to your compiler option to disable that optimization. 

CrasyCat