Acceptance filter mask in S9S12GA240 microcontroller

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Acceptance filter mask in S9S12GA240 microcontroller

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Contributor II

Hello,

I need a question regarding the acceptance mask of the microcontroller MC9S12GA240. I need to accept both standard and extended ID. In particular the list of the messages is:

 - STANDARD: 274h, 518h, 570h, 567h, 565h, 500h, 777h.

 - EXTENDED: 18DAC3F1h.

Following other topics and documentation present in this community, I created 2 boxes of 32bit, one for extended ID and the other for standard ID.

My problem is the system there are a lot of other messages and almost all messages are captured by the CANBUS RX interrupt, because the acceptance filter mask is the OR of all standard IDs. Then I filter the messages by software, but from my side it is better to filter them before interrupt comes.

Do you have any suggestion to create a better filter mask? Is it possible to create one mask for 32bit and 2 mask for 16bit?

Thanks in advance

Andrea Cavazzoni

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Senior Contributor IV
  • My problem is the system there are a lot of other messages and almost all messages are captured by the CANBUS RX interrupt, because the acceptance filter mask is the OR of all standard IDs.

Could you explain your understanding with this OR? '1' in filter mask is 'don't care' for corresponding filter bit. So I'm lost understanding what and why do you mean above.

It is not trivial to calculate best filter setup. You should take into account not only ID, but RTR bit as well. There was AN2010 and AN2010SW for this. Don't know though, was this AN only for standard ID's or did it support extended and/or mix of std/ext. If the most of messages has extended ID, 2x32bit filters could be the best, but if not, then 4x16 or even 8x8bit could filter more, it depends on ID's nomenclature. Here's a bit about problem: 

https://www-users.cs.york.ac.uk/~robdavis/papers/RTNS2017CANFilter.pdf

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Contributor II

Hi Edward,

thank you for your reply.

'OR' simply means that the filter mask for BOX1 (the one I want to use for STANDARD IDs) is 7FEh. With this mask almost every message with standard ID is capture by the interrupt.

Since the extended messages have the same initial structure (all messages starts with 18DAnnnnh) I could use 4 16bit boxes and use one of these boxes for extended message, by checking the IDE bit. Is it a possible solution?

Best regards,

Andrea Cavazzoni

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Senior Contributor IV

Hi Andrea,

OK, understood regarding OR. This is not the right way. I repeat, one in the mask means don't care. You should don't care only bits which you can't make filter for. Lets simplify, say you have just one filter. You need to compare all ID's bit by bit and set mask bit only if bits differ:

1010

1100

1110

mask:

0110 - first and last bit are the same in all your IDs, 0 in the mask,

            inner bits differ from bit to bit

filter:

1000 - first and last bit, which you 'do care' you need to set to match

            all your id's. Bits which you 'don't care' can be any in the filter

That's one point. Another point you should keep in mind that filters operate not on identifiers, like your 18DAC3F1h or 274h, but on the ID mapping. See Figures 18-24 "Receive/Transmit Message Buffer — Extended Identifier Mapping" and 18-25 "Receive/Transmit Message Buffer — Standard Identifier Mapping" from MC9S12G RM. Filter compare not ID's but first bytes starting from IDR0. 32bit filter compares IDR0 to IDR3, 16bit filter IDR0 to IDR1, 8 bit filter only IDR0.

  • Since the extended messages have the same initial structure (all messages starts with 18DAnnnnh) I could use 4 16bit boxes and use one of these boxes for extended message, by checking the IDE bit. Is it a possible solution?

Yes. But you compare not 18DAnnnn, but

((0x18DAC3F1ul & 0x1FFC0000ul) << 3) |

0x00180000ul |

((0x18DAC3F1ul & 0x0003FFFFul) << 1)  = (18D80000h <<3) | 180000h | (2C3F1h << 1) = C6C00000h | 180000h | 587E2h = C6DD87E2h. So,  C6DDnnnn, not 18DAnnnn.

The same with standard ID's, not 274h, but 274h << 5 = 4E80h. See ID mapping. So you have

C6DD, one filter could have 0 mask and C6DD filter

274h, 518h, 570h, 567h, 565h, 500h, 777h shifted left <<5 are :

0100111010000000

1010001100000000

1010000000000000

1010111000000000

1010110011100000

1010110010100000

1110111011100000

I moved them around to group in to 3 the most visually looking to have similar bits set.

3 least significant bits are don't care for standard IDs. Bit3, IDE=0 is do care and should be compared to 0. Now lets calculate filters for those 3 groups

1)

0100111010000000

1010001100000000

0100111010000000 - for filter setting just chose any one ID from the group

1110110110000111 - mask is 0 for equal bits, 1 - for don't care bits, least 3 are don't care since not used in Std.ID compare

2)

1010000000000000

1010000000000000 - filter

0000000000000111 - mask

3)

1010111000000000

1010110011100000

1010110010100000

1110111011100000

1010111000000000 - filter

0100001011100111 - mask

4) 4th filter, assuming "initial structure" is not 18DAnnnnh but 18DA + one more bit. If you look at Extended Identifier Mapping , first two ID registers contain ID28 to ID15 (not ID16):

So, C6DDxxxx:

1100011011011101

1100011011011101 filter

0000000000000000 mask

If initial structure is indeed 18DAnnnn, then

1100011011011101 filter

0000000000000001 mask

Please keep in mind that I could make mistake somewhere above.

Hope this helps.

Edward

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Senior Contributor IV

I forgot one important thing. RTR bit. To receive it both set or cleared, you need to make it don't care in filters for std. identifiers:

1)

 

0100111010000000 - for filter setting just chose any one ID from the group

1110110110010111 - mask is 0 for equal bits, 1 - for don't care bits, least 3 are don't care since not used in Std.ID compare

2)

 

1010000000000000 - filter

0000000000010111 - mask

 

3)

 

1010111000000000 - filter

0100001011110111 - mask

Edward

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