clarification on Paged RAM

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clarification on Paged RAM

984 次查看
rahulkrishna
Contributor IV

Hi everyone,

 

There is a fixed 8k RAM from 0x2000 to 0x4000. Iam using S12xEQ512 in which 32k is available. My doubt is let us say i have allocted a stack of 0x200. So it will occupy from 0x2000 to 0x2200 for stack allocation. And i keep on using my data memory and i exceed 8k RAM. What does the controller do? I think it will start occupying the paged RAM starting from lowest location. My main question is let us say the compiler has put an array of some 30 in the paged memory and i am not aware of it, While accessing the data should i treat it as same as data put in non paged ram or some special treatment is required i mean to say everyone time i have to see the map file?

 

Thanks and regards,

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831 次查看
ZhangJennie
NXP TechSupport
NXP TechSupport

Hi Rahul,

in hcs12x, data in paged ram is accessed in "near" by default, to access data in paged RAM, keywords "rptr" or "far" are necessary.

I made demo code for this topic.

in the sample I use two methods (global address and paged address) to access paged RAM.

In prm file, I defined a global RAM:

GLOBAL_RAM = READ_WRITE 0xF0000'G TO 0XF0FFF'G;

MY_GLOBAL_RAM INTO GLOBAL_RAM;

I upload the sample to this SR web server, please download it there.


Have a great day,
Zhang Jun

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kef2
Senior Contributor V

By default Codewarrior won't let you exceed those 8k of nonpaged RAM. To put more than 8k of data to RAM you'll need to use compiler pragmas #pragma DATA_SEG xxxxx to make specified data put to paged RAM.

By default banked memory model is used with S12XE devices. Large/Custom memory model by defaults puts all variables to paged memory, so you don't need to use #pragma DATA_SEG, compiler and linker decide where your vars are allocated.

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rahulkrishna
Contributor IV

Thank you very much for the reply, i was not aware of the above information. Sorry for the late reply actually i was searching all my map files to confirm myself that some of the data variables are actually placed in the paged RAM by the compiler instead of putting in the non paged RAM. I am using the banked memory model. Can you please suggest me where i am making the mistake. Do you think my linker file is wrong? Please help me.

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