TWR-K70 + CW10.x project creation...?

[vanajagujjala]

Hi all

I am using TWR-K70F120M + CW10.x ARM GCC

Please give sample bareboard project for bellow configurations

Build and Debug Configuration

          1. Code(.text) in Flash and Data(.data,.bss, stack, heap etc) in DDR2

          2. Both Code and Data in DDR2.

I have read the document " Relocating Code and Data Using the CW GCC Linker File for Kinetis.pdf "  and tried to create project for above configuration, but not succeeded.

Please help me...

Thanks.

[Carlos_Musich]

Hi Vanaja,

• For the first problem:

1) Add the following segment in the memory segment of linker file.

extddr (rxw) : ORIGIN = 0x08000000, LENGTH = 0x00080000 /* DDR Address*/

2) Modify the linker file to place each section in the new extrddr segment. E.g.

/* Initialized data sections goes into RAM, load LMA copy after code */

  .data : AT(___ROM_AT)

  {

    . = ALIGN(4);

    _sdata = .;        /* create a global symbol at data start */

    *(.data)          /* .data sections */

    *(.data*)          /* .data* sections */

    . = ALIGN(4);

    _edata = .;        /* define a global symbol at data end */

  } > extddr

3) Modify initialization Files as mentioned in Appendix C and D of the document you mentioned.

• For the second problem just follow instructions in chapter 7.

If the problem persists please let me know the errors you are having.

Regards,

Carlos

[vanajagujjala]

Dear Carlos Musich,

Thanks for your support.

• For the second problem --> " bareboard project configurations(Both Code and Data in DDR2)" -- > is configured & working fine.

• For the first problem:

             You are guided Initialized data(.data) sections is move to Ext_DDR2 memoy, but we need all data section(.bss, .data, stack and heap) is move to Ext_DDR2 memory.

Based on our requirement i have modified project for the bellow configurations with your guidance,

1) memory segment of linker file

Default Linker File for FLASH+RAM Project

/* Highest address of the user mode stack */

_estack = 0x20000000;    /* end of lower SRAM */

__SP_INIT = _estack;

MEMORY

{

m_interrupts (rx)           : ORIGIN= 0x00000000, LENGTH= 0x1E8

m_cfmprotrom (rx)       : ORIGIN= 0x00000400, LENGTH= 0x10

m_text (rx)                     : ORIGIN= 0x00000800, LENGTH= 1M - 0x800

m_data (rwx)                : ORIGIN= 0x1FFF0000, LENGTH= 64K

m_data2 (rwx)              : ORIGIN= 0x20000000, LENGTH= 64K

}

I have modified the Linker File for FLASH+DDR2  Project configuration

_estack = 0x08010000;   

__SP_INIT = _estack ;

MEMORY

{

m_interrupts (rx)           : ORIGIN= 0x00000000, LENGTH= 0x1E8

m_cfmprotrom (rx)       : ORIGIN= 0x00000400, LENGTH= 0x10

m_text (rx)                     : ORIGIN= 0x00000800, LENGTH= 1M - 0x800

m_data (rwx)                : ORIGIN= 0x08000000, LENGTH= 64K

m_data2 (rwx)              : ORIGIN= 0x08010000, LENGTH= 64K

}

2) Sections Segment of linker is same for Default FLASH+RAM Project

3) Modified initialization Files as mentioned in Appendix C and D of the document

while debugging the program for the above configuration it will jump to Default_Handler() at the time of zero_fill_bss() function called.

because .bss count is getting zero. (__END_BSS - __START_BSS  = 0)

Where i have mistake, How to solve?

Thanks.

[Carlos_Musich]

Hi Vanaja,

I was able to reproduce the HardFault. I hove not been able to solve it, but I think a good work around is to modify init code to enable DDR manually and then move the stack pointer to DDR. But you must be careful to reproduce in the new ddr stack what is in the internal sram stack.

I use the code in the attached filesto initialize ddr and move the stack pointer. It is just missing to move/copy the stack content from internal sram to ddr. Youc an find these files insude your project on Project Settings > Startup_Code folder.

I hope this helps.

Regards,

Carlos

[Carlos_Musich]

Actually, you dont need to start ddr manually.

Just leave stack pointer on internal RAM.

/* Highest address of the user mode stack */

_estack = 0x20000000;    /* end of lower SRAM */

__SP_INIT = _estack;

Then at the end of the initialization make the copy of the RAM stack content to DDR and finally move the stack pointer.

Carlos

[vanajagujjala]

Dear Carlos Musich,

Thanks for your great support.

I have solved the problem(FLASH+DDR2  cfg working fine) before that  your last (Jul 1, 2015 5:44 PM) reply..!  But i am not sure at the time, this is the correct method?

now i am clear, in this way is correct.

What i was doing is...

/* Highest address of the user mode stack */

_estack = 0x20000000;      /* pr_test */

__SP_INIT = 0x08010000;      /* pr_test */

void __thumb_startup(void)

{

// setup hardware

__init_hardware();

__init_registers();

//

zero-fill the .bss section

zero_fill_bss();

		.............
		.............

}

void __init_hardware()

{

  SCB_VTOR = (uint32_t)__vector_table; /* Set the interrupt vector table position */

    /*  Watch Dog disabled by CPU bean (need to setup in CPU Inspector) */

    __pe_initialize_hardware();

    /* Enable pin clocks */

    _bsp_gpio_io_init ();

    /* Initialize SDRAM */

    _bsp_ddr2_setup();

}

Thanks & Regards,

Prabhu.S