Hi,
Currently I was doing a project on P4080DS using CodeWarrior. I need to run a simple program, for example, "hello world", on one core of P4080DS. Is it possible to make this project only use part of the L3 cache during the running?
Maybe through some assembly code?
Thanks & Regards,
Peter Zheng
Hi,
Maybe you can configure part of CPC to be SRAM.
What's your purpose of this? If you would like some of the DRAM persisting in Cache, you may try the Cache Lock function. See 8.3.2 Line Locking in P4080RM,pdf for more details if this is what you want.
http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=P4080&fpsp=1&tab=Documentation_Tab
Will your "Hello World" program use DRAM with Cache enabled?
Have a great day,
Lunmin
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Hi Lunmin,
My program will use DRAM with cache enabled.
Regards,
Peter
Hi Lunmin,
I want to run the same program on all 8 cores. The simple program will create a array of integer with the size of 1/8 of CPC and then read the array.
For example, for program in Core 0, I want it can only access 1/8 of CPC.
for program in Core 1, I want it can only access another 1/8 of CPC....etc.
Could this be achieved using Line Locking?
Regards,
Peter
Hi,
No, could not.
Please refer to your another thread, I have a description about the CPC partition:
How to partition the L3 Cacahe of P4080 using CodeWarrior?
Have a great day,
Lunmin
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