HCS12XDP512: problem using page E1 for main CPU instead of XGATE

[vectorio]

In the PRM file, flash pages E0 and E1 are normally assigned to XGATE:

	PAGE_E0	= READ_ONLY   0xE08800 TO 0xE0BFFF ALIGN 2[1:1]; /* is also mapped to XGATE:  0x0800..0x3FFF	*/
	PAGE_E1	= READ_ONLY   0xE18000 TO 0xE1BFFF ALIGN 2[1:1]; /* is also mapped to XGATE:  0x4000..0x7FFF	*/

However, because our application is very large, we want to use PAGE_E1 for the main CPU. But we are experiencing problems with this. In some cases, the checksums check fails on startup (not in page E1, but in other pages). In other cases, we get unexpected interrupts (no. 78, XGATE SW error).

I would like to know whether it's supported to use this page for the main CPU and not for XGATE (if not, I can stop trying). If yes, I would be grateful for some directions as to which steps need to be taken so that it works.

[ZhangJennie]

Hi,

if your project doesn't use XGATE, you can use PAGE_E0 and PAGE_E1 as normal paged flash.

if your project use XGATE, and Xgate is accessing flash, either for const data or program code, avoid using flash pages E0 – E7 for CPU data or code.

this is because :

The flash memory inside the XEP100 is divided in several physical blocks. Pages E0,E1,...E7 constitute one of those blocks.

If the Xgate and the CPU try to access the same block at the same time, the CPU will have priority over the Xgate, and this will result in very poor performance for the Xgate.

So IF Xgate Code is running from pages E0 and E1, it is advised NOT to use the rest of pages E2...E7 for CPU code.

Have a great day,
Jennie Zhang

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