Hi Angelo,
I was in touch with Compiler team.
As explained in my previous post, CW for MCU V10.x is supporting 2 compilers.
The Freescale compiler can not generate the vlma.f32 instruction.
However the GCC compiler generates the code for -O1 and above optimization.
I've checked on my side and got the following code:
+++++++++++++++++++++++++++++
Disassembling 'main.c'...
"C:\Freescale\CW MCU v10.5\eclipse\../Cross_Tools/arm-none-eabi-gcc-4_7_3/bin/arm-none-eabi-gcc" "..\Sources\main.c" @"Sources/main.args" -o"Sources\main.o"
Sources/main.args : -mcpu=cortex-m4 -mthumb -mfloat-abi=hard -mfpu=fpv4-sp-d16 -g3 -gdwarf-2 -gstrict-dwarf -I"C:/Temp/Community/321478/MCU_10.5/GCC_K70/Project_Headers" -I"C:/Temp/Community/321478/MCU_10.5/GCC_K70/Project_Settings/Startup_Code" -I"C:/Freescale/CW MCU v10.5/MCU/ARM_GCC_Support/ewl/EWL_C/include" -I"C:/Freescale/CW MCU v10.5/MCU/ARM_GCC_Support/ewl/EWL_Runtime/include" -O1 -ffunction-sections -fdata-sections -Wall -c -fmessage-length=0 -D__VFPV4__ -specs=ewl_c.specs
"C:\Freescale\CW MCU v10.5\eclipse\../Cross_Tools/arm-none-eabi-gcc-4_7_3/bin/arm-none-eabi-objdump" "Sources\main.o" @"Sources/main.args"
Sources/main.args : -d -S -x
Sources\main.o: file format elf32-littlearm
Sources\main.o
architecture: arm, flags 0x00000011:
HAS_RELOC, HAS_SYMS
start address 0x00000000
private flags = 5000000: [Version5 EABI]
Sections:
Idx Name Size VMA LMA File off Algn
0 .text 00000000 00000000 00000000 00000034 2**1
CONTENTS, ALLOC, LOAD, READONLY, CODE
1 .data 00000000 00000000 00000000 00000034 2**0
CONTENTS, ALLOC, LOAD, DATA
2 .bss 00000000 00000000 00000000 00000034 2**0
ALLOC
3 .text.main 00000054 00000000 00000000 00000034 2**2
CONTENTS, ALLOC, LOAD, RELOC, READONLY, CODE
4 .debug_info 000000f2 00000000 00000000 00000088 2**0
CONTENTS, RELOC, READONLY, DEBUGGING
5 .debug_abbrev 00000077 00000000 00000000 0000017a 2**0
CONTENTS, READONLY, DEBUGGING
6 .debug_aranges 00000020 00000000 00000000 000001f1 2**0
CONTENTS, RELOC, READONLY, DEBUGGING
7 .debug_macinfo 0008778c 00000000 00000000 00000211 2**0
CONTENTS, READONLY, DEBUGGING
8 .debug_line 000001d2 00000000 00000000 0008799d 2**0
CONTENTS, RELOC, READONLY, DEBUGGING
9 .debug_str 00000132 00000000 00000000 00087b6f 2**0
CONTENTS, READONLY, DEBUGGING
10 .comment 0000007a 00000000 00000000 00087ca1 2**0
CONTENTS, READONLY
11 .ARM.attributes 0000003b 00000000 00000000 00087d1b 2**0
CONTENTS, READONLY
12 .debug_frame 00000020 00000000 00000000 00087d58 2**2
CONTENTS, RELOC, READONLY, DEBUGGING
SYMBOL TABLE:
00000000 l df *ABS* 00000000 main.c
00000000 l d .text 00000000 .text
00000000 l d .data 00000000 .data
00000000 l d .bss 00000000 .bss
00000000 l d .text.main 00000000 .text.main
00000000 l d .debug_info 00000000 .debug_info
00000000 l d .debug_abbrev 00000000 .debug_abbrev
00000000 l d .debug_aranges 00000000 .debug_aranges
00000000 l d .debug_macinfo 00000000 .debug_macinfo
00000000 l d .debug_line 00000000 .debug_line
00000000 l d .debug_str 00000000 .debug_str
00000000 l d .debug_frame 00000000 .debug_frame
00000000 l d .comment 00000000 .comment
00000000 l d .ARM.attributes 00000000 .ARM.attributes
00000000 g F .text.main 00000052 main
00000004 O *COM* 00000004 input
00000004 O *COM* 00000004 k2
00000004 O *COM* 00000004 output
00000004 O *COM* 00000004 z
00000004 O *COM* 00000004 k1
Disassembly of section .text.main:
00000000 <main>:
{
int counter = 0;
output = input * k2;
0: f240 0300 movw r3, #0
0: R_ARM_THM_MOVW_ABS_NC input
4: f2c0 0300 movt r3, #0
4: R_ARM_THM_MOVT_ABS input
8: ed93 7a00 vldr s14, [r3]
c: f240 0000 movw r0, #0
c: R_ARM_THM_MOVW_ABS_NC k2
10: f2c0 0000 movt r0, #0
10: R_ARM_THM_MOVT_ABS k2
14: edd0 7a00 vldr s15, [r0]
18: ee27 0a27 vmul.f32 s0, s14, s15
1c: f240 0300 movw r3, #0
1c: R_ARM_THM_MOVW_ABS_NC output
20: f2c0 0300 movt r3, #0
20: R_ARM_THM_MOVT_ABS output
24: ed83 0a00 vstr s0, [r3]
output = (z * k1) + output;
28: f240 0200 movw r2, #0
28: R_ARM_THM_MOVW_ABS_NC z
2c: f2c0 0200 movt r2, #0
2c: R_ARM_THM_MOVT_ABS z
30: edd2 6a00 vldr s13, [r2]
34: f240 0100 movw r1, #0
34: R_ARM_THM_MOVW_ABS_NC k1
38: f2c0 0100 movt r1, #0
38: R_ARM_THM_MOVT_ABS k1
3c: edd1 0a00 vldr s1, [r1]
40: ed93 1a00 vldr s2, [r3]
44: ee06 1aa0 vmla.f32 s2, s13, s1
48: ed83 1a00 vstr s2, [r3]
z = output;
4c: 6818 ldr r0, [r3, #0]
4e: 6010 str r0, [r2, #0]
50: e7fe b.n 50 <main+0x50>
52: bf00 nop
+++++++++++++++++++++++++++++
Attached the project used.
Regards
Pascal