dump & write flash rom for MPC8543 CPU

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dump & write flash rom for MPC8543 CPU

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drew442
Contributor I

I have an IBM BNT Rackswitch G8124.  I think I took too big of a leap in the flash versions.  The switch is bricked.  It runs an MPC8543 CPU from what I can tell.

I have a Codewarrior USP TAB with "900-75115 REV F" and "COP" stickers on the back.

I have downloaded Codewarrior 8.8.  Tried to dump the ROM and I get an error message about specifying the jtag frequency.

Would anyone be able to help me create a config file (or point me to an existing one?)  All I really need to do is reflash the switch correctly to get it working.

Relevant info / forum thread is here 

Thanks for any help you can provide!

 

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8 Replies

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ufedor
NXP Employee
NXP Employee

MPC8543 is supported by CodeWarrior PA 10.5.1.

Please download and install it.

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drew442
Contributor I

Done, thanks.  I should use the 8548 CPU type correct?

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ufedor
NXP Employee
NXP Employee

> I should use the 8548 CPU type correct?

Correct.

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2,764 Views
drew442
Contributor I

OK.  I set up a project for an 8548 CPU, and tried to add a task for the flash writer. I can't seem to get it working.  I get this in the console log

fl::target -lc "kernel"
fl::target -b 0x0 0x80000
fl::target -v off -l off
cmdwin::fl::device -d "S29GL256N" -o "32Mx8x1" -a 0x0 0x1ffffff
cmdwin::fl::image -f "C:\\Users\\Drew\\Desktop\\IBM G8124 Recovery\\Put These On TFTP Server\\ibm-kernel.bin" -t "Binary/Raw Format" -re off -oe on -o 0xfe300000
cmdwin::fl::erase image
Beginning Operation ...
-------------------------
Nothing to erase. No sectors selected
Performing target initialization ...
Error: Connect Failed. No sectors selected
Could not connect to the probe (or other debug link)
[CCS last error: CC config string is invalid ](CCSProtocolPlugin)
Error: Connect Failed.No sectors selected

 

This is an init file for a BDI2000.  Where would I put similar init commands?  I'm guessing somewhere in C:\Freescale\CW_PA_v10.5.1\PA\PA_Support\Initialization_Files\85xx

[INIT]
;
; use the following two lines for STARTUP HALT
WSPR 63 0xffff0000 ;IVPR to boot core
WSPR 415 0x0000f000 ;IVOR15 : Debug exception
;
;
;================= setup for flash programming ===============
; Move CCSRBAR to 0xe0000000
WM32 0xff700000 0x000e0000 ;CCSRBAR to 0xe0000000
;
; Initialize LAWBAR's
WM32 0xe0000C08 0x000c0000 ;LAWBAR1 : @0xc0000000
WM32 0xe0000C10 0x8040001d ;LAWAR1 : Local Bus 1GB
;


; Setup Flash chip select
WM32 0xe0005000 0xf8001001 ;BR0
WM32 0xe0005004 0xf8006E65 ;OR0
; Enable flash programming
WM16 0xfe000000 0x0060 ;clear flash lock-bits
WM16 0xfe000000 0x00d0
DELAY 1000
WM16 0xfe000000 0xffff
;
;================= end flash programming =====================
;


[TARGET]
CPUTYPE 8543 ;the CPU type
JTAGCLOCK 0 ;use 16 MHz JTAG clock
;STARTUP STOP 5000 ;let U-boot code setup the system
STARTUP HALT ;halt core while HRESET is asserted
BREAKMODE HARD ;SOFT or HARD, HARD uses PPC hardware breakpoint
STEPMODE HWBP ;JTAG or HWBP, HWBP uses a hardware breakpoint
WAKEUP 200 ;give reset time to complete
POWERUP 200 ;start delay after power-up detected in ms


[HOST]
;IP 172.20.204.11 ;-----------TFTP SERVER IP------------------
;FILE E:\cygwin\home\demo\e500\fibo.elf
;FORMAT ELF
;FILE E:\temp\dump16k.bin
;FORMAT BIN 0x40080000
LOAD MANUAL ;load code MANUAL or AUTO after reset
PROMPT IBM>


[FLASH]
CHIPTYPE MIRRORX16 ;S29GL256P --- LB4M/LB6M ---
CHIPSIZE 0x4000000 ;The size of one flash chip in bytes
BUSWIDTH 16 ;The width of the flash memory bus in bits (8 | 16 | 32)

 

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2,756 Views
ufedor
NXP Employee
NXP Employee

Debug Connection should be established and be active before executing Flash Programmer Target Task.

Required initial steps:

1) create Bareboard project for the MPC8548 (menu File -> New) using the Project Wizard

2) on the "Debug Target Settings" pane of the Project Wizard check "Connect SRAM" checkbox and select USB TAP as "Connection Type"

3) press "Finish" button

To establish Debug Connection:

1) right-click on the created bareboard project -> Debug As -> Debug Configurations

2) click "_Connect SRAM" Debug Configuration

3) press Debug button

Started Debug Configuration will initialize the board as MPC8548CDS.

If initialization settings of the proprietary board are different edit "8548CDS_init_sram.tcl" in the CFG folder of the created bareboard project.

 

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2,724 Views
drew442
Contributor I

Followed the instructions exactly, got this error.

I can see the TX/RX light flashing and turning orange / green when i start the debug session, so something's talking to the USB TAP.

Error launching flash-core00_SRAM_8548_Connect
CCSProtocolPlugin::Could not connect to the requested core #0.

 

I enabled JTAG diagnostics and got these messages before the prior message:

Starting Power at Probe Test ...

Test result: PASSED

Starting IR Scan test...

Error measuring IR length

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2,718 Views
drew442
Contributor I

did some more digging, found a troubleshooting script.

(bin) 21 % source IDcode.tcl

Scanning for available TAPs connected via USB.....


++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
+
+ Available Remote Connections
+
+ 1 - USBTAP - 10261479
+ 2 - CodeWarriorTAP - <Specify IP Address>
+ 3 - EthernetTAP - <Specify IP Address>
+ 4 - GigabitTAP - <Specify IP Address>
+
+ x - Exit Script without Changes
+
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++

Specify connection:
1

Configuring TAP Interface....

Received CMD_DELETE_CC
command done - Ok
Received CMD_AVAILABLE_CONNECTIONS
command done - Ok
Received CMD_AVAILABLE_CONNECTIONS
command done - Ok
Received CMD_SETUP_CC.CC = utap:10261479
command done - Ok
Configured Connection: utap : 10261479

Received CMD_CONFIG_CHAIN. count = 1
core 0: test core
Received CMD_CC_VERSION
Available USB TAPs:
10261479
Opening connection to USB TAP 10261479
Received CMD_HTI_GET_CRC32
USB TAP command done - Ok
Available USB TAPs:
10261479
Opening connection to USB TAP 10261479
Received CMD_HTI_SET_CRC32
USB TAP command done - Ok
USB TAP command done - Ok
USB TAP command done - Ok
Received CMD_GET_CONFIG_CHAIN
USB TAP command done - Ok
Received CMD_JTAG_LOCK
USB TAP command done - Ok
Received CMD_JTAG_GET_STATE
USB TAP command done - Ok
Received CMD_JTAG_SCAN_RAW.collect_tdo = 0,length = 83886080,state = 0
USB TAP command done - Ok
Received CMD_JTAG_SCAN_IO.reg = 16777216,length = 65536,state = 16777216
USB TAP command done - Ok
Received CMD_JTAG_UNLOCK
USB TAP command done - Ok

TDO -----
|
* Device 0 IDCODE: FFFFFFFF Device: Unknown Device
* Device 1 IDCODE: FFFFFFFF Device: Unknown Device
* Device 2 IDCODE: FFFFFFFF Device: Unknown Device
* Device 3 IDCODE: FFFFFFFF Device: Unknown Device
* Device 4 IDCODE: FFFFFFFF Device: Unknown Device
* Device 5 IDCODE: FFFFFFFF Device: Unknown Device
* Device 6 IDCODE: FFFFFFFF Device: Unknown Device
* Device 7 IDCODE: FFFFFFFF Device: Unknown Device
|
TDI -----


###################################################
#
# configTAP - Redefine TAP interface
#
# scanboard - Scans the target system
# and returns the JTAG IDCode
#
# ir - Loopback test
#
###################################################

 

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2,710 Views
ufedor
NXP Employee
NXP Employee

There is no processor in the JTAG chain.

Please refer to the board documentation to check whether some configuring is required.

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