i2c in assembly again !!

[chop]

Just spent days trying to get the i2c system on a qg08 running , have tried int driven and non , no problems at all when writing to devices but the read is a different story , always get FF as the returned byte , as far as I can tell from the scope the system dies not send any clock pulses on the SCL line when I do a read (lda IICD) after  switching  the device address from transmit to receive mode  (  repeaded start,  IICC_MST =0 , IICC_TX=0) , the pull up resistors are 4K7  and swapping out MCUs makes no difference , and the clincher is that bit banging the I2C lines works beautifully on transmit and receive  !!

I've used both my own code and the "bigmac" code on the board ( On which subject , in the "init i2c" section there is :-   "BCLR   SRW,IICS       ; Set R/W bit = 0"   In the data I have for the QG8 SRW is a read only bit , Have I got an old data sheet or is this an error ?

Any suggestions happliy received :-)  , I'm just at the point of reverting to bit banged code , but it seems such a pity not to use a dedicated system if it's there 

Regards  Art 

[rocco]

hi Art,

Are you sure you want to set IICC_MST to 0? If you do, you would be putting the I2C into slave mode, where it expects another device to provide the clock. I believe you want to remain as master.

mark

[chop]

The MST= 0 was the product of a long day and not really paying attention to what I was writing !!! , it's actially the last thing before attempting to read the required data ( the dummy read returns the read address of the i2c device)

After sending the message to the group I decided to try pulling the MCU out of a previous project (the Si570 controller from John Fisher ,K5JHF) as this uses i2c and was known working , Lo and Behold my system works !!! , Now this is very odd because I had previously swapped out processors with replacements from my spares with no improvement , It now appears that the  spare processors I had were all failed in the same system , This to my mind beggars belief !!   After finding that the ex Si570 contoller chip was working I tried the third and last of my spare ( new in the tube) QG8s , surprise surprise , it didn't work !! , swap back to the ex Si570 , all good :-)  So I think I can rule out my system causing the failures , I can only surmise that my "new" MCUs had lived a previous existence , I think I can cross one supplier off my Xmas card list !!!!!

Many thanks for taking the trouble to answer , sorry it's all been a flase alarm

Art

[abartky]

Art,

If you haven't done so already I highly recommend you checkout Freescale application note AN3291.  Here is a direct link:

http://www.freescale.com/files/microcontrollers/doc/app_note/AN3291.pdf?fsrch=1

It has a good set of sample code for the QG8 (which also by the way works on the QE family as well) for an ISR based I2C driver.

One thing in particular you have to be careful about the IIC block is that when switching from write to read, you also need to do a dummy read of the IICD register.  If you do not do this, then the chip will not start the read cycle on the I2C bus.  This is a quirk of the Q series parts as the IICD is both used for write and read operations and when switching from write to read, you must issue a read of the IICD prior to the actual read on the bus occurring.  See example 15 on page 15 of the spec for the start of the ISR and the part where the dummy read is issued is on page 16 under "case 13:".

I had issue getting my I2C driver up as well for my project, and this app note was the most help.  I think you also will find that once working, the I2C block performs very well and is worth the effort in getting it to work rather than doing bit banging of the interface which also will take up a lot more CPU cycles.

Hope this helps :smileyhappy:

Alan

[chop]

Thanks for the reply , as you may see from my reply to Rocco , It's been a false alarm

As to the App note , before I posted I's downloaded every App note and reference to i2c and freescale I could find , However I just don't "do"  "C" , too many years of assembly , !! 

 thanks for taking the trouble to reply

Art

[UcTechnoGeek]

Just as a note of caution, pay close attention to the read and write timing diagrams of the slave part vs the master part.  I have found many i2c "compliant" devices that are not all that compliant.  One in particular used the opposite clock phase during a read cycle than the write cycle.  Another used a different I2C address for reads than for writes.

Some SPI devices are even worst.  What a pain!