details to the 68HC11A1

[franz_raaber]

Dear discussion group,

I’ve to document a 68HC11A1-Code, were I use the MC68HC11A8.pdf document for details in the

instruction explaining, on page 24 to 26. Mine problem is there to decode the ↕,↓,↑ symbols in

the “Condition Codes” column.

I would be pleased if someone could explain me this symbols.

Mit freundlichen Grüßen

Kind regards

Franz L. Raaber, Dipl. – Ing.

Forschung & Entwicklung - Steuerungstechnik

Research & Development – control engineering

SSI Schäfer Peem GmbH

Fischeraustr. 27, 8051 Graz, Austria

phone   +43 / 316 / 6096 – 582

email    f.raaber@ssi-schaefer-peem.com<mailto:f.raaber@ssi-schaefer-peem.com>

web      www.ssi-schaefer.com<;http://www.ssi-schaefer.com/>

skype   ssi_graz_582

[franz_raaber]

Thank you fore the sanded link, what these symbol describes, but these answers leads to mine fundamental question.

I'v the following code lines

        staa    InBetrieb      

        beq     no_busy        ;jumps if Z=1

        jmp     in_busy         ;running!

where I've seen the second code line only branches if the staa-instruction Z sets to 1.

So do I read, to the instruction "staa", the lines

     Z      X7• X6 • X5 • X4 • X3 • X2 • X1 • X0

          Set if result is $00; cleared otherwise.

in the RM, where for me the question appears what the "result" - of a staa-instruction - is?

I could imagine that the result $00 is, if for example the argument of the instruction a valid one is,

but I couldn't see these explanation on page 579 of the pdf-description.

So, when is the result of a staa-instruction $00?

I couldn't imagine that that result the value of accumulator a describes.  

[iansmusical]

Hi Franz,

I must admit I'm a little confused by the STAA instruction on page 579 because I wouldn't necessarily expect a store instruction to set any conditional codes or return a value!? Although I guess I could accept that if accumulator A is 0 then Z is set as a result of executing the STAA instruction.

So to your question "when is the result of a staa-instruction $00" I would assume that it will be 0 if the accumulator A already contains a 0 value. Therefore, I'd be interested in looking back through your code to see how accumulator A is manipulated. For example, perhaps it is just loaded immediate with 0, which should set the Z flag or perhaps accumulator A is loaded with a value and following an addition or subtraction the result placed in accumulator A is 0, again setting the Z flag.

Again hope that helps and doesn't confuse! :smileyhappy:

Thanks,

Ian

[kef2]

In case of STAA, the "result" is what is going to be written to InBetrieb. Z is set when accumulator A is zero.

[kef2]

↕ means that instruction may set or clear status bit.

↓ means that instruction may clear status bit, but can't set it. For example TAP instruction can only clear X bit (↓), and set or clear all other status bits (↕).

[franz_raaber]

Once again, dear Mr. Karpicz,

do I have to ask you about your answer: you have used in booth answers the word “may”, which I read similar to the word

“could”. But if this case is true does, for the user, this information by the arrows have no real sense – or better said, doesn’t

the user get information, that could be used. Do you agree?

Kind regards

Franz Raaber

Von: Edward Karpicz

Gesendet: Mittwoch, 21. August 2013 11:10

An: Raaber Franz

Betreff: Re: - details to the 68HC11A1

<https://community.freescale.com/>

details to the 68HC11A1

reply from Edward Karpicz<https://community.freescale.com/people/kef2?et=watches.email.thread> in 8-bit Microcontrollers - View the full discussion<https://community.freescale.com/message/345892?et=watches.email.thread#345892>

[iansmusical · Accepted solution]

Hello Franz,

I have to say I agree with Edward but I'm wondering if you'd be better reading the statement as:

↕ means "an" instruction "can" set or clear status bit.

↓ means "an" instruction "can" clear status bit, but can't set it.

Then, reading for a specific instruction

↕ means "the" instruction "could" set or clear "the" status bit.

↓ means "the" instruction "could" clear "the" status bit, but can't set it.

Hope this helps and doesn't confuse!

Ian

[franz_raaber]

Hallo Ian,

thank you very much about your mail, but your explanation tells me that the instructions where

↕ and ↓ in the Condition Code appears doesn’t give me an certain information, in which value this

status bit appears. This symbol gives me only the information that this status bit is for the specified

instruction irrelevant, because it can’t be used to specify if this instruction executed was.

Do you agree?

Yours

Franz

Von: Ian Legg

Gesendet: Mittwoch, 21. August 2013 18:13

An: Raaber Franz

Betreff: Re: - details to the 68HC11A1

<https://community.freescale.com/>

details to the 68HC11A1

reply from Ian Legg<https://community.freescale.com/people/iansmusical?et=watches.email.thread> in 8-bit Microcontrollers - View the full discussion<https://community.freescale.com/message/345942?et=watches.email.thread#345942>

[kef2]

I think I got it :smileyhappy:. It seems you are looking for information provided in HC11 reference manual. It includes more detailed information about CPU flags, not just 0,1,↕ and ↓. Please download and navigate to Appendix A. Instruction Set Details

http://cache.freescale.com/files/microcontrollers/doc/ref_manual/M68HC11RM.pdf

[iansmusical]

Hi Edward,

Thanks, I'd realised the same and was just about to link to that RM to! :smileyhappy:

Ian

[kef2]

No, I don't agree. How each status bit behaves is explained in detail for each instruction. 0, 1, -, ↕ and ↓ visualize how resulting flag behaviour is limited for given instruction. 0 - flag is always reset, 1 - always cleared, '-' - doesn't change, ↕ - the same like ir was, set or clear, ↓ - the same like ir was or clear only. This information helps when you need to execute one or more additional instructions before you do contitional branch. It helps determining do you need or not to save and restore status register while executing those extra instructions. For example say you need to test Y register for sign and then add B to Y before conditional branch:

   CPY  #0

   TPA      // save flags

   ABY

   TAP      // restore flags

   BPL go

ABY doesn't change flags, so you can remove marked lines.