On AN3825SW I found up these delays but I don't agree with them.
My opinion is that with a bus clock of 4MHz each cycle is 0.25 uS long.
It means that 100uS cannot be 4000/400=10 cycles of FOR in the routine
void Delay_100us(void)
A FOR is using 8 cicles + 1 NOP it means 9*0.25uS= 2.25uS
The same problem seems to be on the remaining delay.
Is it correct or I am wrong.
Thanks
ByeBye
* (c) Copyright 2004-2008 Freescale Semiconductor, Inc. *
* ALL RIGHTS RESERVED. *
* *
*******************************************************************************
*******************************************************************************
* Example for MC9S08SG8 - Metronom + LCD + Buttons *
* - Li-Ion Charger *
* - DC/DC Bosst Converter *
******************************************************************************/
//----- MCU Definitions --------------------
#define BUS_SPEED 4000 // BusCLK in kHz;
#define DELAY1MS BUS_SPEED/22
#define DELAY100US BUS_SPEED/400
#define TIMER2DIV 128
//*****************************************************************************
void Delay_100us(void)
{
word i;
for (i = 0;i<=DELAY100US;i++)
{
asm nop;
}
}
//*****************************************************************************
void Delay_1ms(void)
{
word i;
for (i = 0;i<=DELAY1MS;i++)
{
asm nop;
}
}
//*****************************************************************************
void WaitNms(word n)
{
int j;
for(j=1;j<=n;j++)
{
Delay_1ms();
__RESET_WATCHDOG();
}
}
