Unable to Set 9S08GW Pins With LCD to output only

キャンセル
次の結果を表示 
表示  限定  | 次の代わりに検索 
もしかして: 

Unable to Set 9S08GW Pins With LCD to output only

ソリューションへジャンプ
656件の閲覧回数
Designer11
Contributor IV

Hi All,

 

I'm having an issue trying to configure the pins PTD, and PTE to operate in output mode only. For a test, i tried to toggle PTD4 and PTD5 from low to high and vice versa. Below is a snippet of my code. I had VLL3 connected to VDD (3.3V), but no luck at all.

 

SOPT1 = 0b11011010;

//clock setting

ICSC1 = 0x06;

ICSC2 = 0x00;

ICSTRM = 0x8B;

ICSSC = 0x20;

 

    /** Enable clock to the LCD module */

    SCGC2_LCD = 1;

    /** Disable LCD module */

    LCDC0_LCDEN = 0;

    LCDC1_FCDEN = 1;

    LCDSUPPLY_VSUPPLY = 0b11

///Toggle pins direction

    PTDDD_PTDDD4    = 0x01;

    PTDDD_PTDDD5  = 0x01;

    //Switches input controls

    PTDD_PTDD4 = 0x01;

    PTDD_PTDD5 = 0x00;

 

I've looked at the below post, but it doesn't help much.

Re: Ports PTB3, PTB4 and PTB5 on MC9S08GW, Open drain function only?

 

 

Thank you in advance for any help that can be provided!

ラベル(1)
0 件の賞賛
返信
1 解決策
511件の閲覧回数
Designer11
Contributor IV

Hi All,

Problem solved ! First time working with the GW series. I forgot to enable Port D clock via SCGC3 register, SCGC3_PTD = 1.

Thanks.

元の投稿で解決策を見る

0 件の賞賛
返信
2 返答(返信)
512件の閲覧回数
Designer11
Contributor IV

Hi All,

Problem solved ! First time working with the GW series. I forgot to enable Port D clock via SCGC3 register, SCGC3_PTD = 1.

Thanks.

0 件の賞賛
返信
511件の閲覧回数
vicentegomez
NXP TechSupport
NXP TechSupport

Hi Vu

yes, I also send you a sample code on the case that you create.

Regards

Vicente Gomez

0 件の賞賛
返信