Thanks Mac, but I'm still a little confused as to the whole operation of this thing:
1. I tried just running a simple program using the internal clock,
CLKS = 01
IREFS = 1
BDIV = 00
And toggling an output port every 50 cycles.
It comes out as a crazy low frequency (like 6Hz).
Change CLKS to 00 and my output is in the 3-3.5kHz area, but that still doesn't make any sense to me.
2. Using the same program, I can't get the 2MHz crystal to work at all, the output stays the same when I pull the chip out, put it back in, reset, etc.
I've read your post https://community.freescale.com/message/58177#58177regarding maximum usable bus frequency, and I think I can get by with a 2-4MHz bus clock, but currently I seem to be a few orders of magnitude lower than that.
Clock jitter is the primary issue here, I just want a stable source to work with.
How would I set up my registers for either of these options?
I'm done debugging and don't need the BDM at this point...
Thanks again