Thanks for showing another way to write pre-start code. We prefer to have the watchdog and LVD initialized immediately after a reset, in the first 5 or 6 fetch/decode/execute cycles after the reset. With supporting documentation everything has worked out well.We will try it if when we get this problem solved.
I have to admit we are really bad, bad boffins. We also modify standard .PRM files that are produced by codewarrior to control stack size, emulate NVRAM, do CRCs on flash banks, and leave space for production programming to add their traceability data.
For I/O I have done the following.
1) Initialize GPIO pins as outputs-- or when they must be inputs, I have verified that the external pull ups are working by ensuring voltages are near the rail with an Agilent 10Gohm impedance DMM. (We use 499K pull ups to save power and still operate around 1.8V- even a 10Megohm meter gives deceptive results.)
2) I have even accounted for the direction of GPIO pins which are multiplexed with other peripherals--we disable, enable and clock gate these modules on and off to save power in the final application. We never turn off the LCD, but I have intiialized the GPIO pins multiplexed with the LCD as outputs since I do not know what the Freescale circuitry does.
All current measurements consist only off current entering the microcontroller through the VDD, VAA. VREFH pins. These pins are lifted off the PCB, tied together, tied to a 1.0uF chip cap glued to top of the chip and then fed 3.0V through an Agilent DMM/ammeter. This should the equivalent of the current calculated by the Freescale Battery Calculator.
The programs are loaded with BDM. We simplify initialize and execute a STOP statement (we are setup to use STOP3 mode) leaving the LCD running in regulated/charge pump mode. Next, the BDM is disconnected, and target power is toggled to do a reset so anything the BDM forced on is now off. We use the Internal LPO so there is no issue regarding clock sources or trimming.
We see 1100 uA with BDM connected.
We see 800+ uA with BDM disconnected
After toggling power with BDM disconnected we see 76uA. We should see 1uA.
After disabling everything but the ICS, TOD, and LCD module, the clocks to the remaining modules are gated off.
The VREF1 and VREF2 modules are both disabled (one of them does not exist or is not bonded out)-- there are bits to gate clocks to both modules.
The LVD module is turned off, and the BANDGAP is turned off.
When we make new code to do all of the above except TURN THE LVD ON and BANDGAP ON, the current remains at
76uA. We would expect the current to increase from the prior case if we were indeed controlling the LVD.