2.2.4 Background / Mode Select (BKGD/MS)
During a power-on-reset (POR) or background debug force reset (see Section 5.8.3, “System Background Debug Force Reset Register (SBDFR)” for more information), the PTA4/TPM2CH0O/BKGD/MS pin functions as a mode select pin....
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If nothing is connected to this pin (kef: note that MS pin pull-up is active after reset), the MCU will enter normal operating mode at the rising edge of the internal reset after a POR or force BDC reset. If a debug system is connected to the 6-pin standard background debug header, it can hold BKGD/MS low during a POR or immediately after issuing a background debug force reset, which will force the MCU to active background mode.
3.4 Active Background Mode
The active background mode functions are managed through the background debug controller (BDC) in the HCS08 core. The BDC provides the means for analyzing MCU operation during software development.
Active background mode is entered in any of five ways:
• When the BKGD/MS pin is low at the rising edge of reset
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