QE128 64 pin has two MISO1, SS1

[BasePointer]

Hi,

QE128 64 pin has many pins for SPI1 module.

for SPI1

PTE0/TPM2CLK/SPSCK1 (pin 60)
PTE1/MOSI1 (pin 59)
PTE2/MISO1 (pin 54)
PTE3/SS1 (pin 53)

and

PTB2/KBI1P6/SPSCK1/ADP6 (pin 32)
PTB3/KBI1P7/MOSI1/ADP7 (pin 31)
PTB4/TPM2CH1/MISO1 (pin 19)
PTB5/TPM1CH1/SS1 (pin 18)

---------------------------------

for SPI2

PTD0/KBI2P0/SPSCK2 (pin 2)
PTD1/KBI2P1/MOSI2 (pin 1)
PTD2/KBI2P2/MISO2 (pin 46)
PTD3/KBI2P3/SS2 (pin 45)

I wonder mean of shared pins.

When I enable SPI1 module, which pin will have SPSCK1, PTE0, PTB2 or both?

If both, I will be lost 4 I/O functionality? This is bad.

Regards,

BP.

[tonyp]

No surprises here.  From the manual:

"SPI1 pins (SS1, MISO1, MOSI1, and SPSCK1) can be repositioned using SPI1PS in SOPT2.
Default locations are PTB5, PTB4, PTB3, and PTB2."

[BasePointer]

I just saw them, this is a good news thank you so much tony!

SPI1 Pin Select — This bit selects the location of the MOSI1, MISO1, SPSCLK1, and SS1 pins of the SPI1 module.
0 SPSCLK1 on PTB2, MOSI1 on PTB3, MISO1 on PTB4, and SS1 on PTB5.
1 SPSCLK1 on PTE0, MOSI1 on PTE1, MISO1 on PTE2, and SS1 on PTE3.