Hi Badri,
First make sure you are using correct SPI timing:

Note that SPI “Mode 1” is used, which means that an inactive state of clock signal is low (CPOL = 0), input data are latched on falling edge of the clock signal and output data changed on the rising edge (CPHA = 1).
SPI input signal levels to the MC33771 operate at 5.0V logic levels, but are 3.3V compatible. The SO output driver provides 5.0V levels only and therefore must be attenuated to be compatible with a 3.3V MCU.
Each SPI message consists of 40 bits (means CSB low -> 40 bits -> CSB high) and six fields:

1. Memory data - 16 bits - the data itself
2. Master / Slave - 1 bit (0 = master - write, 1 = slave - respond)
3. Memory address - 7 bits - register address
4. Device address - 4 bits - address of the node (CID = Cluster ID)
5. Tag ID - 4 bits - controller initiates it for each conversion and MC33771 response must contain the same Tag ID.
6. CRC - 8 bits - cyclic redundancy check (attached is an example calculation).
In SPI mode, the initialization only consists in writing INIT[CID] = 1 followed by a read command of the INIT register.
Then the MC33771 registers need to be programmed for the device to work as required by the application (there is an example sequence in the AN12084).
Best regards,
Tomas