More RS232 issues on S08QG8

[irob]

Continuing from where I left off with getting RS232 communication via the SCI on a MC9S08QG8 target board, I have some new questions.

Getting that code working on my DEMO board, I now am in the process of porting it into my target board (same MCU).

I was having difficulty interfacing with a low-voltage micro-power RS232 transceiver (ICL3232). So I did some sleuthing on the DEMO board and its transceiver is wired differently than mine.

Specifically, the SCI pins are backwards. The good wizards at Axiom (the makers of the DEMO board) have PTB1 on a T1in pin (transmit out to RS232) and PTB0 on a R1out pin (receive from RS232).

But my MC9S08QG8 datasheet, rev 1.01, 10/2005, page 192 clearly shows the SCI port block diagram as having PTB1 as receiver and PTB0 as transmitter, both in the arrow direction and the label on the lines. Yet, the labels of the port pins have these titles reversed.

What's going on here?

[baddad]

Sorry this caught you, but one of my first rules of design: "Don't trust the block diagram". 

Who knows how many times this has been cut and pasted from other manuals, ect...

check the pin definitions (page 29).  PTB1 = Txd, PTB0 = RxD.

I don't think Freescale meant to confuse you, but those block diagrams are a visual representation of the part, not exact wiring diagrams.

BadDad

[bigmac]

Hello,

The block diagram in the data sheet is actually correct on the pin side of the "Port B" block.  It identifies the following pins -

PTB0/KBIP4/RxD/ADP4 and

PTB1/KBIP5/TxD/ADP5

A bit of "artistic licence" (perhaps "artistic license" to some) appears to have been taken on the other side of the block, with an implied "cross-over" for TxD and RxD paths within the block.

Regards,

Mac

[peg]

Yes... well its not wrong, but it could have been done just a little clearer.

The pins on the right have been listed in numerical order by their port number. Where possible they have lined one of the possible uses of the pin with the signal on the left of the port box.

Take a look at PTA4/ACMPO, they could have lined it up but chose to keep it in numerical order.

The port boxes represent the port multiplexers what comes in/out on the right does not necessarily go in/out directly to the left.

Of course there is nothing dictating the order of the SCI signals on the left of the port box and perhaps it would have been a little clearer to place them the other way around so that they lined up with the possible i/o pins like has been done where possible elsewhere.

[irob]

Sheesh, that is confusing. But thanks for the info, gents.

I switched my port pins and got it working!