MC9S08QG8 KBI and SCI interrupt need help..

[HussainAftab]

Hi i am using MC9S08QG8, according its data sheet

the SCI interrupt has higher priority than KBI interrupt

but in my code when the processor is in the KBI ISR

it does not serve the SCI interrupt..

what am i missing or doing wrong.?

CODE: 

// ********* PERIPHERAL INITIALIZATION ********* // 

void PeriphInit(void)

{  

  SOPT1 &= 0x0F;

  // ********** IO Port Initialization ********** //

  PTAD = 0x00;

  PTADD = 0xF7;

  PTBD = 0x00;

  PTBDD = 0xF2;

  ICSTRM = NVICSTRM;

  ICSC2 = 0x00;

  ICSC1 = 0x04;

  // ******** Serial Communication Interface ******** //

  SCIC1 = 0x00;

  SCIC2 = 0x2C;

  SCIC3 = 0x00;

  SCIBDH = 0x00;      // For 9600 Baud rate

  SCIBDL = 0x35;      // For 9600 Baud rate

  // **** Flash Registers Initialization **** //

  FSTAT = 0x30;       // Clear error flags 

  FCDIV = 0x13; 

  // **** Keyboard Interrupt Initialization **** //

  KBISC = 0x06;       // Select both edges and level detect

  KBIPE = 0x08;       // Enable KBIP3 (PTA3) as keyboard interrupt

  KBIES = 0x00;       // Select Low level Detect

} 

// ***************************************** // 

// ******* SERIAL RECEIVE INTERRUPT ******* //

  void interrupt 15 RDRF_ISR(void) 

  {

   SCIS1 = 0x00;

  receivedbyte = SCID;

  tag_received[count] = receivedbyte;

  count++;

   if(count == 12)

  {

    tag_recv = 1;

    PTAD_PTAD1 = 1;

    PTAD_PTAD0 = 1; 

    //flash_write();

    for(k = 0; k < 2; k++)

      Delay_100us(255);

    PTAD_PTAD1 = 0;

    PTAD_PTAD0 = 0;

    count =0;

  }

  //while(SCIS1_TDRE == 0);

  //SCID = receivedbyte;

  }

// **************************************** //

// ******** KBI INTERRUPT (PUSH BUTTON) ******** //

  void interrupt 18 KBI_INT(void) 

  {

    //KBISC_KBIE = 0;

    Delay_100us(255);

    KBISC_KBACK = 1;

    for(q=0;q<3;q++) 

    {

      if(tag_recv == 1)

      {

        flash_write();

        tag_recv = 0;

        break;

      }

      PTAD_PTAD1 = 1;

      for(k = 0; k < 2; k++)

        Delay_100us(255);

      PTAD_PTAD1 = 0;

      for(k = 0; k < 2; k++)

        Delay_100us(255);

      PTAD_PTAD1 = 1;

      for(k = 0; k < 2; k++)

        Delay_100us(255);

      PTAD_PTAD1 = 0;

      for(k = 0; k < 50; k++)

        Delay_100us(255);

    }

    KBISC_KBIE = 1;

  }

// ********************************************* //

void main(void) 

{

  unsigned int i,c = 0,flag = 0;

  tag_recv = 0;

  EnableInterrupts;

  PeriphInit();

  while(1) // Forever

  {

     for(i=0;i<14;i++) 

     {

     while(SCIS1_TDRE == 0);

     if(i > 11) 

     {

        SCID = '\n';

        Delay_100us(10);

        while(SCIS1_TDRE == 0);

        SCID = '\r';

        Delay_100us(10);

     }

     SCID = (*((byte *)tag_1 + i));

     Delay_100us(10);

     }

  } // end of while(1)  

} // end of main 

[tonyp]

---

Hussain Aftab wrote:

Hi i am using MC9S08QG8, according its data sheet

the SCI interrupt has higher priority than KBI interrupt

but in my code when the processor is in the KBI ISR

it does not serve the SCI interrupt..

what am i missing or doing wrong.?

---

Higher priority does not mean one interrupt can interrupt another.  What it means is that if two (or more) interrupts are pending at the same time, the higher priority one will be served first.  But, once an ISR is running (and CCR[I] is 1) no other interrupt can execute (with the exception of SWI and resets) until the CCR[I] becomes 0 again, which normally happens when the ISR terminates.

If you need to allow SCI ints from within another ISR, you must enable interrupts from within the ISR but this can be tricky, and can lead to problems if not careful how you do it.  In this particular example, however, it is very unlikely you will have to do this, as even the fastest common SCI speeds can tolerate some latency.  Now, if your ISR (any ISR) is way too long in execution time, then you must consider rewriting it so that the bulk of the work is done in the main loop, or some other place outside the ISR.  The ISRs should always be kept as short and quick as possible.  The delays within your ISRs, for example, are "unacceptable", even though I take it you only used them for testing.

Message Edited by tonyp on 2009-12-22 10:49 AM