I just run my QE with 6MHz crystal in FBELP mode by this code:
// *** FBELP MODE ***
// 6MHz Crystal
// Fbus = ( Fext * 1 / BDIV ) / 2
ICSC2_BDIV = 0b00; // selected clock / 1
ICSC2_RANGE = 1; // high range select
ICSC2_HGO = 0; // low power
ICSC2_LP = 1; // FLL disabled
ICSC2_EREFS = 1; // oscillator request
ICSC2_ERCLKEN = 0;
ICSC2_EREFSTEN = 0;
for ( i=0 ; i<1000 ; i++ );
//while ( ICSSC_OSCINIT == 0 );
ICSC1_RDIV = 0b111; //
ICSC1_IREFS = 0;
ICSC1_IRCLKEN = 0;
ICSC1_IREFSTEN = 0;
ICSC1_CLKS = 0b10; // external reference clock selected
I am still quite confused by this many modes of operation, and fact that in FBELP mode BDC should not be active, but I have full functional debuging (code step, breakpoint, periodical RAM readouts ...)