MC9S08 SRS / watchdog problem

[Nik]

Hi,

I  have COP enabled.  If I put the program into a loop without a watchdog reset, the processor resets as expected.

But the SRS register alomost always is clear.  Sometimes the PIN bit is set, sometimes the COP bit is set, sometimes POR bit is set.  Most of the time the register is clear.  If I debug, and cause a watchdog timeout, the SRS_COP is set.

I just power up the project and I got a SRS_POR.  Then I reset the processor by the reset pin and got a SPS_POR.

Goofy as hell.  any ideas?

Thanks,

-

Robert

[rocco]

Hi Robert,

What chip are you using?

On the GP32, the SRS register was reliable. But the same code running on the GB60 seems to experience what you are describing.

[Nik]

The part is the MC9S08JM60.  Do you know if there is there errata for this bug?  Is Freescale aware of this problem?  

Thanks,

Robert

[rocco]

Hi Robert,

I have not found an errata, but I'm also not sure it is a bug in the chip.

My GB60 board is not yet in production, so the issue I'm seeing is through the debugger and the BDM. I have learned to take what I see in the debugger with a grain of salt. It could easily be a debugger problem.

I will know better once I'm running the GB60 standalone.