MC9S08 Bizarre BDM/ATD/COP/STOP problem

[PG1]

I have the following code below.

It works fine when the BDM is not connected, or BDM is connected with COP DISABLED.

When the BDM is connected, and COP is ENABLED,  the debugger hangs on the while loop.

apparently because there is never any int from the ADC. Since the COP counter is set to zero and frozen in

STOP3 mode, there is no WDT occurring while the converter is busy.

The ADC is configured to use the clock generated within its own module.

1) Is this a limitation of the BDM

2) Why would the ADC stop working if the COP was enabled?

3) As an aside, The BDM has an option to keep all clocks running in stop mode by using BDM commands to write to

   BDM registers outside of the memory map. How do you do this in True Time SImulator/Real Time Debugger

.......

    gOnChipATDConversionComplete=FALSE;              //Arm Flag
    ADCSC1=ENABLE_ADC_INTS+INT_BG_AD_INPUT;          //do a converstion
                                                     //results will be in
                                                     //gATDResults, loaded
                                                     //by isr
   
               
    __RESET_WATCHDOG();
      
    while (gOnChipATDConversionComplete==FALSE)       
         {
         _Stop;                                      //sit here and wait, not using any extra power
         }
......

......

  ///////////////////////////////////////////////////////////////////////////////
 // Function: isrADC               
 
 // Passed Parameters:             
 //      none
 // Return Parameters:
 //      none
 // Description:
 //     Called when conversion complete. Allows complete processor shutdown during
 //     conversion because the hardware will wake up on this int, allows for reduced energy
 //     consumption and radiated e.
 // Test Status:
 //      Tested on BDM
 ///////////////////////////////////////////////////////////////////////////////
#pragma CODE_SEG NON_BANKED         //in case banked memory model is used, cpu does
                                    //does not support bank number on hw stack

  void interrupt 17 isrADC()
  {
    gOnChipATDConversionComplete=TRUE;
    gOnChipATDResults=ADCRH;              //ack the int by
    gOnChipATDResults*=256;               //reading registers
    gOnChipATDResults+=ADCRL;             //in a specific order while
                                          //while converting to
                                          //a 16bit uint
    return;
  }

[bigmac]

Hello,

I assume that you are entering stop3 mode? You do not specifically say which stop mode.  Often, the MCU type is also useful additional information.

There does seem to be a misconception about the operation of stop mode.  During stop, no instructions are being executed, since the bus clock is disabled.  When exit from stop3 does occur, the ISR code (if applicable) will firstly be executed, and then operation will continue immediately following the STOP instruction that caused stop3 mode to be entered.

Therefore, the following code could be problematic -

while (gOnChipATDConversionComplete == FALSE) {
   _Stop;   // sit here and wait, not using any extra power
}

This would fail should wakeup from Stop3 mode be initiated by other than the ADC interrupt (except for a reset).  There is no need for the loop - all you need is the STOP instruction, so that any source of wakeup will cause normal operation to continue immediately after the instruction.  Of course, you would then need to test the flag to positively determine that the ADC result was valid.

Regards,

Mac

[PG1]

Yes I am using STOP3 and an S08LL36.

The intent of the while loop is: Keep the processor in stop mode. If something wakes it up, check to see if was the ADC ISR.

If is was not the ADC, go back into stop mode. (For instance a KBI int may wake up the processor while it is in the while loop)

1) Why would that fail, or is there something I misunderstand in the above statement?

2) Any insight as to why the BDM would hang in that while loop if the COP was enabled? Its never been clear to me how the BDM interacts with STOP3, but for some reason enabling the COP changes how the BDN works with STOP.