HCS08: SPI transfers with less than 8 bits

[Smiffytech]

I have a situation where I need to shift 20 bits of data to a device. (Actually 17 bits - but the shift register in the device in question is 20 bits long, so I an always pad.)

Is there any way in which I can get the SPI peripheral in an HCS08 part to transfer only half a byte? So, transfer one byte, another byte, then half a byte, to end up with 20 bits.

I can't see any indication in the datasheet that this is possible, and am assuming I'll have to bit-bang the interface, but thought I'd ask just in case there's some kind of magic that will allow me to use the native hardware.

[Smiffytech]

Thank you, that solves the problem :smileyhappy:

The part (a MAX6921 vacuum fluorescent display (VFD) driver) is designed to be cascaded, and only sets its outputs once a Latch Enable pin is pulsed - so sending unwanted bits FIRST will indeed do the job.

Now my only problem is the error I made in the circuit board design, so I have to work around it in software.

Cheers

M

[bigmac · Accepted solution]

Hello,

The SPI operation always generates eight clock pulses as each byte is sent - there is no way to vary this.

However, assuming the slave device incorporates a simple shift register of length 20 bits, the sending more than 20 clock pulses will overflow the register, but this is potentially not a problem.  Align the 20 data bits so that these are not the ones that overflow.  For the usual operation of MSB sent first, the 20 bits would be right-aligned.  The upper nybble of the first byte sent would be the overflow bits.

The assumption is that the data is strobed into the slave peripheral when the SS signal is raised.  If the data is automatically strobed when a count of 20 bits is reached, a different approach would be required.  In this case, the data would need to be left-aligned.

Knowledge of the slave peripheral you are using might permit a more definitive answer.

Regards,

Mac