Getting started with I2C on the QG8

[datamstr]

Hi all,

I am using the QG8 and want to use the I2C Bus to receive data, first by polling. I am sending I2C data from a Netburner Module (MOD-5270 Coldfire Processor). Question: What is the margin of error of the clock freq for the SCL to receive data on the QG8? The MCF5270 is transmitting at a clock freq of 64.102 KHZ. The signals look good on the scope. I have the QG8 setup to "receive" using the Device Initialization Bean in CW 5.0.

Also, the QG8 clock freq is 62.5 KHZ in the CW Device Initialization GUI.

MCUInit() Code:

Note: I am using PTB 6 and PTB7 for SDA and SCL.

 /* Common initialization of the write once registers */
 /* SOPT2: COPCLKS=0,IICPS=1,ACIC=0 */
 SOPT2 = 0x02;                                     

 /* ### Init_IIC init code */
 /* IICA: ADDR6=0,ADDR5=0,ADDR4=0,ADDR3=0,ADDR2=0,ADDR1=0,ADDR0=1 */
 IICA = 0x02;                                     
 /* IICF: MULT1=0,MULT0=1,ICR5=0,ICR4=0,ICR3=1,ICR2=0,ICR1=0,ICR0=1 */
 IICF = 0x49;                                     
 /* IICC: IICEN=1,IICIE=0,MST=0,TX=0,TXAK=0,RSTA=0 */
 IICC = 0x80;                                     

I am simply monitoring the incoming I2C data with:

 if(IICS_TCF)
   LED.Data[0][6] = IICD;  // turn on some LEDs on target board using SPI

I suspect that the TCF flag is never getting set.

What am I missing for this to work?

Thanks,
David

[datamstr]

Hi all,

I am now able to receive I2C data on the QG8, after some experimentation and code changes

However, I have another question:

Using the following test code, the QG8 slave works great. I can receive 2 bytes in about 500 us, I am using a scope to measure this.

Code:

 for(;;) {   __RESET_WATCHDOG(); /* feeds the dog */ if(IICS_TCF)   temp = IICD;   } 

 

Now, if I add the .56 ms delay after reading the IICD Register, it seems that the QG8 is holding either the SCL or SDA line low for the entire delay time.

Code:

 for(;;) {   __RESET_WATCHDOG(); /* feeds the dog */ if(IICS_TCF)   temp = IICD;  for (tmp=0; tmp<100; tmp++);     /* Delay (100 = .56ms delay)  */   } 

 

I would expect that immediately after reading the TCF bit and the IICD register, the I2C Master would get the ACK bit and send the next byte. I have been going over the datasheet and any specs I can find, but I am stumped on this one. Even though the QG8 Slave is asserting the ACK bit, it seems like the I2C Bus is not "released" until the end of the for(;; ) loop.

Any thoughts on this one?

TIA,
David

Alban: code format

Message Edited by Alban on 2007-01-30 03:18 PM