Flash memory requirements for SMBus V2.0

[prakashbhumired]

Hi

We have proposed MC9S08PA16 for customer who wants to use this MCU as a SMBus slave. They actually needed SMBus V2.0 I/O exapander (their intention is to have dynamic address allocation for the slave).  As we do not have a I/O expander with SMBus, they are OK to use an MCU with SMBus (V2.0, which supports, address resolution protocol, ARP) and use its GPIOs.

Now, there are two questions:

1. How much flash memory (minimum) is required  to implement SMBus 2.0 protocol for a slave (MCU , MC9S08PA16 )? As MC9S08PA16  has 16kb flash, it could not meet customer pricing. Is 8k/4k flash OK?

2. Do you have any SM bus Address Resolution Protocol application code in MC9S08PA16AVTGR to show communication from one master board to multiple slaves ( minimum 3 numbers ). All slave boards would have same salve address by default , but while connecting to master it should dynamically allocate a different address to each slave , so that they can communicate with slave individually?

Kindly request urgent help/suggestion .

Regards

Prakash

[mfugere]

Unfortunately I do not have any SMBus code to share for MC9S08PA16.  I *did* find PMBusLib example code for implementing Power Management Bus ( which is a protocol layer on top of SMBus functionality) with example codes for 56F8xxxx controllers.   You would have to do some porting, but it could give you a starting point if you haven't already found it.

http://www.nxp.com/products/software-and-tools/software-development-tools/processor-expert-and-embed...

Also, in case you did not find this already, general NXP app note on SMBus protocol, but no code examples-

http://cache.nxp.com/docs/en/application-note/AN4471.pdf?fsrch=1&sr=1&pageNum=1