Fast 16 bit binary to 5 digit BCD for S08

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Fast 16 bit binary to 5 digit BCD for S08

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asciidv
Contributor I

I am looking for a fast 16 bit  binary to a 5 BCD digit routine in assembler for an S08. Can anyone make any suggestions?

 

Thanks,

 

Ascii

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implicit
Contributor II

How fast is fast?

This really boils down to dividing the binary number by ten four times and saving the remainders as the BCD digits, something which is straightforward on the HCS08 given the fast division instruction. The only "trick" is that the two of divisions by ten may overflow (e.g. the 16/8-bit division may generate larger than 8-bit results) and therefore need to be synthesized through pairs of divisions where the remainder from the MSB carries into the LSB division. Some contortions are needed to get the right values into the proper places, but that's just how optimized code goes on the terminally register-starved S08.

The following is my half-baked attempt which takes the 16-bit bin variable as input and spits out a 3-byte (big-endian) bcd buffer as output. It should take 103 cycles assuming zero-page variables.

lda     bin+0     ;1st division (0..65535 / 10)
ldhx     #10
div
psha
lda     bin+1
div
sta     bcd+1
pula
pshh
ldhx     #10      ;2nd division (0..6553 / 10)
div
psha
lda     bcd+1
div
sthx     bcd+1
pulh                ;3rd division (0..655 / 10)
div
pshh
ldhx     #10      ;4th division (0..65 / 10)
div
pshh

sta     bcd+0    ;Save and pack and the final BCD nibbles
tsx
lda     bcd+1
nsa
ora     2,x
sta     bcd+2
pula
nsa
ora     1,x
sta     bcd+1
ais     #2

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1,374件の閲覧回数
asciidv
Contributor I

Johan,

Thank you for this. 103 cycles is fast enough (at the moment!). Since you must be familiar with the S08 could I trouble you and ask you another question?

On a PCB layout for the S08 (we use the 64 pin S08) do you think it is necessary to connect all the external Vss pins. I know that it might be best practice to do so, but in the real world do you think it is necessary?

Thanks,

Ascii

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implicit
Contributor II

It's may not technically be necessary but certainly a very good idea. Doing so will shorten the ground paths, reducing noise. Plus I expect it'll allow you to sink more current.

At least that's my software-engineering take on things.

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implicit
Contributor II

How fast is fast?

This really boils down to dividing the binary number by ten four times and saving the remainders as the BCD digits, something which is straightforward on the HCS08 given the fast division instruction. The only "trick" is that the two of divisions by ten may overflow (e.g. the 16/8-bit division may generate larger than 8-bit results) and therefore need to be synthesized through pairs of divisions where the remainder from the MSB carries into the LSB division. Some contortions are needed to get the right values into the proper places, but that's just how optimized code goes on the terminally register-starved S08.

The following is my half-baked attempt which takes the 16-bit bin variable as input and spits out a 3-byte (big-endian) bcd buffer as output. It should take 103 cycles assuming zero-page variables.

lda     bin+0     ;1st division (0..65535 / 10)
ldhx     #10
div
psha
lda     bin+1
div
sta     bcd+1
pula
pshh
ldhx     #10      ;2nd division (0..6553 / 10)
div
psha
lda     bcd+1
div
sthx     bcd+1
pulh                ;3rd division (0..655 / 10)
div
pshh
ldhx     #10      ;4th division (0..65 / 10)
div
pshh

sta     bcd+0    ;Save and pack and the final BCD nibbles
tsx
lda     bcd+1
nsa
ora     2,x
sta     bcd+2
pula
nsa
ora     1,x
sta     bcd+1
ais     #2
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