Hello JD,
The state of GPIO is controlled by means of flip-flops to provide "static" operation, independent of clock rate. However, I think that it must be assumed that external interference and noise may potentially corrupt the settings, particularly for those registers more closely associated with the GPIO pins.
If the corruption of any register can affect the operation of the end product, the setting should be periodically refreshed. In this category I would include DDR, and maybe pullup control and drive strength registers. Typically, I would refresh these on each repetition of the main loop. Other registers may also need to be considered, depending on the particular project, although any write-once registers would be excluded.
The re-initialization of peripherals might also be considered, but would need to be done in such a way that peripheral operations already in progress would not be adversely affected.
A further contentious issue concerns the automatic ANSI initialization of global variables at startup, and the period prior to their first read usage. Some would advocate that automatic initialization should be inhibited, and that explicit initialization should occur closer to the time of first usage.
Returning to GPIO considerations, it is sometimes required to emulate an open drain output by flipping the DDR bit between input and output, with a permanently low output state. Keep in mind that, if any other pin on the same port has its output state altered, when the open drain pin is currently set to input, the "permanent" low state will always flip to high. Therefore, the output low state should always be refreshed after the pin is set to output.
Regards,
Mac
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