Dear Wolfgang,
There are a lot of inconsistencies or errors in your code, or at least I have not fully understood what you want to do. It seems to me you want to produce some repetitive pulses on two lines of PORT A at an undefined (?) frequency. Here following I will list what I noticed.
- In the 9S08QG8 the Watchdog is enabled by default and in your code it is not explicitly disabled. There is no Watchdog serving in your loop so your program would hang up in any case not later than 256ms after start (1kHz source, long period watchdog)
- You do not define the frequency you want your uCU to run. The only note on that is on the second line of your code (16.38kHz). Your Internal Clock Source (ICS) is by far wrongly preset. You may either use IREFCLK which may range 31.25-39.06kHz as clock source before dividing by BDIV (this should be the case if you want a BusClock frequency as low as ~16kHz) or FLL out (DCOout) which ranges 16 to 20MHz. In this case the reference input to the FLL loop must be comprised in 31.25-39.06kHz: because in your case this reference comes from IREFCLK, RDIV must be preset to 1 (as by default). You either chosen FFL as clock source and RDIV=128: this is not compatible!
- There are some pullups on port A. This may be ok for unused input lines. Output lines are unaffected.
- You defined a delay routine based on MTIM module. This is ok but MTIM preset should be defined on top of the program not everytime the delay routine is called. Anyway it is a minor problem and it may work even so with some overheading
- Definitely worse is the fact that you either preset TOIE on timer without serving the resulting interrupt (in fact the program hangs up at the first interrupt) and do not start the timer (in fact you stop it by defining TRST=1). This line must be edited resetting TOIE and TRST.
- Once edited all the major problems the code produce a very fast output pulse on port A (some 11us long with a 1MHz BusClock). Nevertheless it may work. If you want to have a 50% duty square-wave output you should ex-or your output lines each time the delay routine exit.
Here attached is a complete edited project based on your code on a CW6.3 framework which was tested with CW6 Full Chip Simulator. BusClock was derived by FFE and scaled to 1MHz, the timer is preset as you suggested (prescaler=64, Modulo counter= 155) and the output is a short pulse with 200Hz repetition rate (it should be 100Hz but there is some error in my preset or in the simulation). I did not really test in a breadboard so there may be some other error but simulation is ok. IREFCLK must be trimmed to 31.25kHz as by default during CPU programming: please note there is no explicit instruction in my code to copy factory preset or programmer's found ICSTRIM/FTRIM in the ICSSC register.
Here is the asm portion:
; 9S08QG8 ASM FRAMEWORK EXAMPLE
; CREATED BY CODEWARRIOR 6.3
; EDITED BY SALVATORE COSENTINO, 2013-04-08
; File 9S08QG8 main 02.asm
;*****************************************************
; This stationery serves as the framework for a user
; application.
; For a more comprehensive program that demonstrates
; the more advanced functionality of this processor,
; please see the demonstration applications, located
; in the examples subdirectory of the
; "Freescale CodeWarrior for HC08" program directory.
;*****************************************************
; Include derivative-specific definitions
INCLUDE 'derivative.inc'
; export symbols
XDEF _Startup, main
; we export both '_Startup' and 'main' as symbols.
; Either can be referenced in the linker .prm file
; or from C/C++ later on
XREF __SEG_END_SSTACK
; symbol defined by the linker for the end of the stack
; variable/data section
MY_ZEROPAGE: SECTION SHORT
; Insert here your data definition
; Code section
MyCode: SECTION
main:
_Startup:
LDHX #__SEG_END_SSTACK ; init stack pointer
TXS
CLI ; enable interrupts
; Wolfgang's code:
; MOV #$3F,ICSC1 ;SET CORE CLOCK 16.38KHZ
; #%00111111
; |||||||+ IREFSTEN=1 (?)
; ||||||+- IRCLKEN=1 (?)
; |||||+-- IREFS=1 (Int.ref.ck select)
; ||+++--- RDIV=128 (invalid for IREFS)
; ++------ CLKS=00 (FLL out selected)
; MOV #$00,ICSC2 ; BDIV=0, rest by default
; set ICSout to 2MHz, BusClock = 1MHz
; Int.REF.clk.Selected (31.25-39kHz, 31.25kHz default)
; DCOout= 512*IREF= 512*31.25kHz= 16.00MHz (default)
; BDIV= 8, ICSout= DCOout/BDIV= 2MHz, BusClock= 1MHz
MOV #%00000100,ICSC1
; |||||||+-- IREFSTEN=0 (default)
; ||||||+--- IRCLKEN=0 (default)
; |||||+---- IREFS=1 (Int.ref.ck select)
; ||+++----- RDIV=1 (RDIV_CLK=IREFCLK)
; ++-------- CLKS=00 (FLL out selected)
MOV #%11000000,ICSC2
; ++-------- BDIV=0, rest by default
LDX #%11110110 ; $F6
STX PTAPE ;ENABLE PULL UP RES. ON A
;no pull-up on PA0 & PA3
MOV #$FF,PTBDD ;DDReg B (all out)
MOV #$09,PTADD ;DDReg A (PA0 & PA3 as out)
LOOP MOV #$09,PTAD ;PA0 & PA3 = 1
JSR TIMER ;TIME DELAY
; This line makes only a pulse on A, few clk cycle
; long (11 clk with watchdog serve, i.e. ~11us)
MOV #$00,PTAD ;PA0 & PA3 = 0
; Watchdog serving (Watchdog is preset!)
feed_watchdog ; call Wdog macro
BRA LOOP
;*****************************************************
; ROUTINES
;*****************************************************
; Timer clock= BusClock, Prescaler= 64
; i.e. Tclk= 15625Hz, Modulo counter by 155
; Fo= roughly 100Hz
TIMER MOV #%00000110,MTIMCLK ; =$06 (presc.=64)
MOV #$9A,MTIMMOD ; =154dec
; TOIE set, TRST set (counter reset i.e. disabled)
; CANNOT FUNCTION BECAUSE INTERRUPT IS NOT SERVED
; NOR THE COUNTER IS STARTED!
; MOV #%01100000,MTIMSC ; =$60;TSCR1
; START COUNTER FREE-RUNNING, NO INTERRUPT
MOV #%00000000,MTIMSC ; TOIE=0, TRST=0
TT BRCLR 7,MTIMSC,TT ;WAIT FOR TOF
BSET 7,MTIMSC ;CLEAR TOF
RTS
Sorry by the horrendous format due to the forum editor. The enclosed zipped project file comprised a .rtf copy correctly formatted in addition to the .asm in the source files directory.
Good luck
Salvatore