908JK3 unexpected port pulse at power up.

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908JK3 unexpected port pulse at power up.

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JimDandy
Contributor III

Hi all. :smileyhappy:

Got a new project up and going using a 908JK3 as part of an ignition coil driver. Works extremely well, particularly controlling dwell under transient rpm changes at low speeds. Anyhoo... on power up there is an unintended 2 volt 10mS pulse coming out of port B4. (maybe others too but not using them) At power up this causes single spark from the coil. Chip is running on 5 volts and there is a 10k resistor from this port to the base of a PN100 transistor. I put a 1k resistor as a load from port to ground and the pulse is reduced from 2 volts to 200mV and the problem is "solved". :smileyindifferent: I am setting the ports to initial values ~before~ writing to the DDRs to avoid the glitch problem the datasheet mentions. Also I noticed that if I hold the reset line low it still happens so it is not the DDR thing mentioned above. I'm sure this thing is probably well known. 

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bigmac
Specialist III

Hello,

 

My guess is that this may be occurring during a very slow ramp-up of the Vdd voltage, caused by external bulk capacitance.  During this process, whilst the Vdd level is very low, and until the LVI hardware releases the reset condition, the I/O state is indeterminate.  It may be possible that the I/O pin provides sufficient leakage current to turn on the transistor for a short period, prior to becoming an input immediately out of reset.

 

Depending on the load resistor at the collector of the PN100, the turn-on base current may be only a few microamps.  To control the switching current level, a better solution may be to place an additional resistor between base and emitter of lthe transistor, say 10k.  This will provide a threshold current level of 60-70 microamps.

 

Regards,

Mac

 

Addendum:  I have just seen your second post.

After POR occurs, the pullup on IRQ pin is enabled by default.  Again assuming a slow Vdd ramp-up, there may be a few milliseconds delay before the execution of insructions commences, after the LVI reset, for the second MCU, is released.

 

 

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bigmac
Specialist III

Hello,

 

My guess is that this may be occurring during a very slow ramp-up of the Vdd voltage, caused by external bulk capacitance.  During this process, whilst the Vdd level is very low, and until the LVI hardware releases the reset condition, the I/O state is indeterminate.  It may be possible that the I/O pin provides sufficient leakage current to turn on the transistor for a short period, prior to becoming an input immediately out of reset.

 

Depending on the load resistor at the collector of the PN100, the turn-on base current may be only a few microamps.  To control the switching current level, a better solution may be to place an additional resistor between base and emitter of lthe transistor, say 10k.  This will provide a threshold current level of 60-70 microamps.

 

Regards,

Mac

 

Addendum:  I have just seen your second post.

After POR occurs, the pullup on IRQ pin is enabled by default.  Again assuming a slow Vdd ramp-up, there may be a few milliseconds delay before the execution of insructions commences, after the LVI reset, for the second MCU, is released.

 

 

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JimDandy
Contributor III

G'day bigmac. Just came back inside from the shed and its soooo cold. (Melb SE subs) Yes you are dead right as I found out independently. During the reset time of the second micro before the code starts running its IRQ pin pulls up on the line,  for 10 mS in this case. When I removed the first micro the second one kept its IRQ line pulled up permanently and I assumed it was not recognising the IRQPUD but it was somewhat more low tech than that - removing the first micro also meant there was no system clock. Ah... yep yep yep  :smileywink:

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JimDandy
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Right. I have found where it is coming from. The port also connects to the interrupt pin of another 908JK3 on the board. I had set bit 7 of CONFIG2 $001E of this second micro to disable the interrupt pin pullup resistor but it still wants to pull up this line.  Pull this second chip out of it's socket and all works fine so its not coming from somewhere else. The IRQPUD just doesn't want to work. Hmm...

 

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