Hello Pedro,
The TPM module associated with the HCS08 device should be capable of generating both 0 and 100 percent PWM duty.
The output from the ADC module will range 0-1023 decimal. Assuming that the 16-bit value from ADCR is directly written to TPMC1V after each ADC conversion, you might set the TMOD value to 1023. Assuming TPM prescale division of 1, the TPM period would be 1024 bus cycles, and the PWM duty range would be 0 to 1023/1024.
Alternatively, you could set TMOD to 1022, and the PWM duty should range 0 to 1 (i.e. 1023/1023). In this case, the TPM period would be 1023 bus cycles.
For the ADC, I would not use continuous conversion mode, since there would appear to be little point in generating more than a single conversion for each PWM period. Therefore, the ADC conversion should be synchronised to the PWM operation.
The concept is simple. Wait for a PWM cycle to complete, by polling the TPM overflow flag. Then read the result of the previous ADC conversion, and commence a new conversion. Alternatively, the TPM overflow interrupt could be utilised. The new duty value should then commence one PWM period later, after the next counter overflow. The PWM period will be sufficient to complete the ADC conversion, without the need to test the COCO flag.
; Polling operation:
brclr TPMSC_TOF,TPMSC,* ; Wait until overflow flag is set
bclr TPMSC_TOF,TPMSC ; Clear overflow flag
ldhx ADCR ; Read previous ADC conversion result
sthx TPMC1V ; Update PWM value
mov #1,ADCSC1 ; Commence new conversion ADC ch 1
There are a number of other issues with your initialisation process.
Best to initialise the stack point prior to any other code.
No need for the LDA APCTL1 instruction prior to the BSET instruction. However, the bit number is incorrect - for ADC channel 1 the bit number is 1 (and not 2).
The ADTRG bit within ADCSC2 should remain clear since you not externally triggering each conversion.
Regards,
Mac