Vybrid ProcessorsのトピックRe: About capture the DCU CLK

About capture the DCU CLK

keisukewatanabe — Tue, 06 Aug 2013 10:45:23 GMT

Dear support,

I am going to connect to LCD at LVDS Transmitter.

The port of TWR uses the DCU0.

To capture the signal;

1. Is there a register to select the rising or falling edge of DCU0_PCLK?

2. Do I set to either?

Best regards,

Keisuke

naoumgitnik — Tue, 06 Aug 2013 22:53:36 GMT

Dear Keisuke,

Is this question about the Vybrid pin or the Tower board port's (connector's) pin, please?

Best regards,

keisukewatanabe — Wed, 07 Aug 2013 01:39:33 GMT

Dear Naoum,

>Is this question about the Vybrid pin or the Tower board port's (connector's) pin, please?

I want to know about the Vybrid.

Best regards,

Keisuke

naoumgitnik — Fri, 09 Aug 2013 21:24:02 GMT

Dear Keisuke,

Please, take a look at the INV_PXCK bit of the Synchronize Polarity Register (DCUx_SYNPOL).

Best regards, Naoum Gitnik.