Vybrid ProcessorsのトピックThis an automatic process. We are marking this post as s...

Is it allowed to keep the input receiver buffer enabled all the time?

peterlischer — Tue, 18 Nov 2014 16:15:45 GMT

In order to use a pad as an input, the input receiver buffer needs to be enabled with the input buffer enable field (IBE). This is clear so far. My question is whether it is allowed to keep this input buffer enabled all the time, even if a pin is used as an output. Is there any drawback when leaving the buffer enabled? Could there be any conflict with interfaces when leaving the buffer enabled?

Here an example:

The Ball PTD0 is configured and used as SCI2_TX output (UART TX). Is it possible to leave the input buffer enabled in order to be able to read back the actual pin level? This could be helpful to detect whether the SCI2_TX output is shorted externally.

Re: Is it allowed to keep the input receiver buffer enabled all the time?

naoumgitnik — Thu, 20 Nov 2014 19:53:36 GMT

Dear Peter,

Since the quite uncommon situation you are asking about is not described in our documentation, I turned to the Vybrid IC design team for consultation, and below is their reply:

Although it might work, since nobody considered this scenario useful, it has not been tested.
Even if it works, at best one will have to follow some sequencing like enabling/disabling paths at the right time, etc., which, again, nobody thought about nor tested,
Based on my experience, if a customer expresses interest in an uncommon operating mode of our product, request for additional testing effort (which is usually laborious hence quite costly) goes via our Marketing department, and, based on what they call "customer's buying potential", they make their decision if to approve this effort or not.

(Of course, you may use a second IO configured as an input to monitor the actual state of the output one, but this is not what you are asking about...)

Sincerely, Naoum Gitnik.

This an automatic process. We are marking this post as s...

CommunityBot — Thu, 03 Sep 2020 15:07:59 GMT

This an automatic process.

We are marking this post as solved, due to the either low activity or any reply marked as correct.

If you have additional questions, please create a new post and reference to this closed post.

NXP Community!