topic Changing attributes for different memory regions in Vybrid Processors https://community.nxp.com/t5/Vybrid-Processors/Changing-attributes-for-different-memory-regions/m-p/968755#M6020 <HTML><HEAD></HEAD><BODY><P style="color: #51626f; background-color: #ffffff; border: 0px;">Hi Experts,</P><P style="color: #51626f; background-color: #ffffff; border: 0px;">&nbsp;</P><P style="color: #51626f; background-color: #ffffff; border: 0px;">Is it possible to change the memory attributes for different memory regions for Cortex-M4 core in HALO processor MAC57d5xx?</P><P style="color: #51626f; background-color: #ffffff; border: 0px;">As mentioned in the reference manual, the default attributes for different regions for ex: DRAM is WBWA, i want to try to change this area to non-cacheable instead being cacheable, so is there a way? i don't find anything in the reference manual.</P><P style="color: #51626f; background-color: #ffffff; border: 0px;">There is no MMU but MPU for M4 core.</P><P style="color: #51626f; background-color: #ffffff; border: 0px;"></P><P style="color: #51626f; background-color: #ffffff; border: 0px;">Or simply there is<SPAN>&nbsp;</SPAN><STRONG style="border: 0px; font-weight: bold;">no way</STRONG><SPAN>&nbsp;</SPAN>to control cacheability attributes of different address space regions for&nbsp;HALO CM4, right?</P></BODY></HTML> Tue, 11 Jun 2019 10:25:26 GMT zubairefd 2019-06-11T10:25:26Z Changing attributes for different memory regions https://community.nxp.com/t5/Vybrid-Processors/Changing-attributes-for-different-memory-regions/m-p/968755#M6020 <HTML><HEAD></HEAD><BODY><P style="color: #51626f; background-color: #ffffff; border: 0px;">Hi Experts,</P><P style="color: #51626f; background-color: #ffffff; border: 0px;">&nbsp;</P><P style="color: #51626f; background-color: #ffffff; border: 0px;">Is it possible to change the memory attributes for different memory regions for Cortex-M4 core in HALO processor MAC57d5xx?</P><P style="color: #51626f; background-color: #ffffff; border: 0px;">As mentioned in the reference manual, the default attributes for different regions for ex: DRAM is WBWA, i want to try to change this area to non-cacheable instead being cacheable, so is there a way? i don't find anything in the reference manual.</P><P style="color: #51626f; background-color: #ffffff; border: 0px;">There is no MMU but MPU for M4 core.</P><P style="color: #51626f; background-color: #ffffff; border: 0px;"></P><P style="color: #51626f; background-color: #ffffff; border: 0px;">Or simply there is<SPAN>&nbsp;</SPAN><STRONG style="border: 0px; font-weight: bold;">no way</STRONG><SPAN>&nbsp;</SPAN>to control cacheability attributes of different address space regions for&nbsp;HALO CM4, right?</P></BODY></HTML> Tue, 11 Jun 2019 10:25:26 GMT https://community.nxp.com/t5/Vybrid-Processors/Changing-attributes-for-different-memory-regions/m-p/968755#M6020 zubairefd 2019-06-11T10:25:26Z