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    <title>topic Re: Vybrid (vf610) Chip Errata document in Vybrid Processors</title>
    <link>https://community.nxp.com/t5/Vybrid-Processors/Vybrid-vf610-Chip-Errata-document/m-p/849259#M5984</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Could anybody from NXP comment on this issue?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks in advance,&lt;/P&gt;&lt;P&gt;Łukasz&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 15 Oct 2018 10:59:55 GMT</pubDate>
    <dc:creator>lukaszmajewski</dc:creator>
    <dc:date>2018-10-15T10:59:55Z</dc:date>
    <item>
      <title>Vybrid (vf610) Chip Errata document</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/Vybrid-vf610-Chip-Errata-document/m-p/849258#M5983</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Dear Community,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I would like to ask if there is a "Chip errata" document for Vybrid (e.g. vf610)?&lt;/P&gt;&lt;P&gt;I'm asking since there are some issues with DMA usage with DSPI controller and also QSPI controller HW issues as pointed out in the Linux kernel code:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;(What's more is that there is a bug in&amp;nbsp;&amp;nbsp;the "IP Command Read" in the Vybrid.) found here:&lt;BR /&gt;&amp;nbsp;&lt;A href="https://elixir.bootlin.com/linux/v4.19-rc4/source/drivers/mtd/spi-nor/fsl-quadspi.c#L671"&gt;https://elixir.bootlin.com/linux/v4.19-rc4/source/drivers/mtd/spi-nor/fsl-quadspi.c#L671&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I've found some Vybrid errata:&amp;nbsp;&lt;A class="link-titled" href="https://www.nxp.com/docs/en/errata/VYBRID_2N02G.pdf" title="https://www.nxp.com/docs/en/errata/VYBRID_2N02G.pdf"&gt;https://www.nxp.com/docs/en/errata/VYBRID_2N02G.pdf&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;but it seems a bit outdated now. It also doesn't provide information, which I need.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;For example - the iMX6Q has a very detailed (and up to date) "Chip Errata" document:&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 20 Sep 2018 14:15:32 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/Vybrid-vf610-Chip-Errata-document/m-p/849258#M5983</guid>
      <dc:creator>lukaszmajewski</dc:creator>
      <dc:date>2018-09-20T14:15:32Z</dc:date>
    </item>
    <item>
      <title>Re: Vybrid (vf610) Chip Errata document</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/Vybrid-vf610-Chip-Errata-document/m-p/849259#M5984</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Could anybody from NXP comment on this issue?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks in advance,&lt;/P&gt;&lt;P&gt;Łukasz&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 15 Oct 2018 10:59:55 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/Vybrid-vf610-Chip-Errata-document/m-p/849259#M5984</guid>
      <dc:creator>lukaszmajewski</dc:creator>
      <dc:date>2018-10-15T10:59:55Z</dc:date>
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