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    <title>Vybrid ProcessorsのトピックRe: PTB18 strange behaviour</title>
    <link>https://community.nxp.com/t5/Vybrid-Processors/PTB18-strange-behaviour/m-p/238822#M590</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Anthony,&lt;/P&gt;&lt;P&gt;thank you for your reply. Regarding GPIO you are right, it was our stupid mistake (incorrect understanding of DSE register). It works correctly.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Anyway we still have the problem with audio. On Kinetis K70, EXT_AUDIO_MCLK was configurable to be either input or output, which made perfectly sense. We expected that to be the same on Vybrid and designed a module SQM4-VF6 (&lt;A href="http://www.sqm4.com/sqm4-vf6-vybrid-module"&gt;http://www.sqm4.com/sqm4-vf6-vybrid-module&lt;/A&gt;) where we used PTB11 as SCI0_RX, which excludes its use as a clock source (as it is used on TWR).&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Besides the fact we would not like to redesign the module, I primarily do not believe this is the only way to use SAI. Can you please suggest another way of clocking SAI without the need of externally connecting two pins of the processor? We use SGTL5000.&lt;/P&gt;&lt;P&gt;&lt;SPAN class="mce_paste_marker"&gt;&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="mce_paste_marker"&gt;In MQX, I'm not sure SAI is properly configured for TWR as well, as no function from sai_int_ksai.c nor &lt;/SPAN&gt;_bsp_sai_io_init() from init_gpio.c is called during MQX initialization (used twrvf65gs10_a5 BSP of MQX 4.0.1). In Linux, ALSA prints during boot there are no audio devices found.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 26 Jun 2013 10:15:28 GMT</pubDate>
    <dc:creator>Kubiznak</dc:creator>
    <dc:date>2013-06-26T10:15:28Z</dc:date>
    <item>
      <title>PTB18 strange behaviour</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/PTB18-strange-behaviour/m-p/238820#M588</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;when debugging SAI audio on Vybrid (PVF61GS151CMK50 1N02G), we encountered problem with PTB18 behaviour. When IOMUXC_PTB18 MUX set to 0x02 (master clock), it does not output clock.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;In GPIO mode (MUX 0x00) does not work properly in CMOS mode (ODE 0), works only as open-drain (ODE 1).&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Tested on two MCUs with the same result.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Is this a known issue? Is there any workaround to make audio working on TWR?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 25 Jun 2013 15:53:52 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/PTB18-strange-behaviour/m-p/238820#M588</guid>
      <dc:creator>Kubiznak</dc:creator>
      <dc:date>2013-06-25T15:53:52Z</dc:date>
    </item>
    <item>
      <title>Re: PTB18 strange behaviour</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/PTB18-strange-behaviour/m-p/238821#M589</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&amp;nbsp; This is not a known issue. The EXT_AUDIO_MCLK is an input, not an output. You can see the clock tree in Section 9.10.10 of the latest RM "ESAI clocking"&lt;/P&gt;&lt;P&gt;&lt;SPAN class="mce_paste_marker"&gt;&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; I also tried out PTB18 as GPIO on the Vybrid tower board (primary elevator A35) and could use it successfully in CMOS mode. I used the following code:&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;&amp;nbsp; IOMUXC-&amp;gt;SINGLE.PTB18 = IOMUXC_PTB18_DSE(0x1)| IOMUXC_PTB18_OBE_MASK; //enable GPIO output for PTB18&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;&amp;nbsp; GPIO1-&amp;gt;PTOR|=PIN(8);&lt;/STRONG&gt;&lt;/P&gt;&lt;TABLE&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD&gt;&lt;/TD&gt;&lt;TD&gt;&lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;P&gt;-Anthony&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 25 Jun 2013 23:05:12 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/PTB18-strange-behaviour/m-p/238821#M589</guid>
      <dc:creator>anthony_huereca</dc:creator>
      <dc:date>2013-06-25T23:05:12Z</dc:date>
    </item>
    <item>
      <title>Re: PTB18 strange behaviour</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/PTB18-strange-behaviour/m-p/238822#M590</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Anthony,&lt;/P&gt;&lt;P&gt;thank you for your reply. Regarding GPIO you are right, it was our stupid mistake (incorrect understanding of DSE register). It works correctly.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Anyway we still have the problem with audio. On Kinetis K70, EXT_AUDIO_MCLK was configurable to be either input or output, which made perfectly sense. We expected that to be the same on Vybrid and designed a module SQM4-VF6 (&lt;A href="http://www.sqm4.com/sqm4-vf6-vybrid-module"&gt;http://www.sqm4.com/sqm4-vf6-vybrid-module&lt;/A&gt;) where we used PTB11 as SCI0_RX, which excludes its use as a clock source (as it is used on TWR).&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Besides the fact we would not like to redesign the module, I primarily do not believe this is the only way to use SAI. Can you please suggest another way of clocking SAI without the need of externally connecting two pins of the processor? We use SGTL5000.&lt;/P&gt;&lt;P&gt;&lt;SPAN class="mce_paste_marker"&gt;&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="mce_paste_marker"&gt;In MQX, I'm not sure SAI is properly configured for TWR as well, as no function from sai_int_ksai.c nor &lt;/SPAN&gt;_bsp_sai_io_init() from init_gpio.c is called during MQX initialization (used twrvf65gs10_a5 BSP of MQX 4.0.1). In Linux, ALSA prints during boot there are no audio devices found.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 26 Jun 2013 10:15:28 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/PTB18-strange-behaviour/m-p/238822#M590</guid>
      <dc:creator>Kubiznak</dc:creator>
      <dc:date>2013-06-26T10:15:28Z</dc:date>
    </item>
    <item>
      <title>Re: PTB18 strange behaviour</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/PTB18-strange-behaviour/m-p/238823#M591</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&amp;nbsp; MQX doesn't support SAI yet in 4.0.1, it'll be added in the next release, and that is why it's not called during MQX initialization. In Linux, it is likely detecting the TWR-AUDIO card and if it does not see it, then prints out the not found message. I'm not certain on that last point though. &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; As for your questions about how to use the SAI, that is being looked at. Can you provide how you're currently connecting the SAI pins currently to the SGTL5000? &lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 27 Jun 2013 21:50:15 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/PTB18-strange-behaviour/m-p/238823#M591</guid>
      <dc:creator>anthony_huereca</dc:creator>
      <dc:date>2013-06-27T21:50:15Z</dc:date>
    </item>
    <item>
      <title>Re: PTB18 strange behaviour</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/PTB18-strange-behaviour/m-p/238824#M592</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I just want to point out/clarify, &lt;STRONG&gt;EXT_AUDIO_MCLK &lt;/STRONG&gt;is an input to the SAI/ESAI modules, but it can be an output for the Vybrid chip; at least that is my belief.&amp;nbsp; You can program the CCM to set the value of the &lt;STRONG&gt;EXT_AUDIO_MCLK&lt;/STRONG&gt; and use the same clock to route to the codec master clock.&amp;nbsp; So the CCM generates (outputs) &lt;STRONG&gt;EXT_AUDIO_MCLK&amp;nbsp; &lt;/STRONG&gt;and both the SAI/ESAI and the codec can use &lt;STRONG&gt;EXT_AUDIO_MCLK &lt;BR /&gt;&lt;/STRONG&gt; as an input.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 19 Feb 2014 19:02:02 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/PTB18-strange-behaviour/m-p/238824#M592</guid>
      <dc:creator>billpringlemeir</dc:creator>
      <dc:date>2014-02-19T19:02:02Z</dc:date>
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